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System Memory Cacheability And Shareability; System Memory Address Map - Intel MultiProcessor Specification

Intel multiprocessor specification
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MultiProcessor Specification
4GB
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1MB
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640K
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PART OF THIS SPECIFICATION
UNSHADED ADDRESS REGIONS ARE FOR REFERENCE ONLY AND SHOULD NOT BE CONSTRUED AS THE SOLE
DEFINITION OF A PC/AT-COMPATIBLE ADDRESS SPACE.

3.2 System Memory Cacheability and Shareability

The cacheability and shareability of the physical memory space are defined in Table 3-1. The
address space reserved for the local APIC is used by each processor to access its own local APIC.
The address space reserved for the I/O APIC must be shareable by all processors to permit dynamic
reconfiguration.
3-2
BIOS PROM
LOCAL APIC
I/O APIC
MEMORY-MAPPED
I/O SPACE
EXTENDED
MEMORY REGION
SHADOWED BIOS
SHADOWED
EXPANSION BIOS
EXPANSION ROM
ROM EXTENSIONS
VIDEO BUFFER
SYSTEM-BASED
MEMORY
Figure 3-1. System Memory Address Map
Version 1.4

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