The first two interrupt modes, PIC Mode and Virtual Wire Mode, provide PC/AT-compatibility.
At least one of these modes must be implemented in systems that comply with the MP
specification. In these modes, full DOS compatibility with the uniprocessor PC/AT is provided by
using the APICs in conjunction with standard 8259A-equivalent programmable interrupt
The third mode, Symmetric I/O Mode, must be implemented in addition to either PIC Mode or
Virtual Wire Mode. An MP operating system is booted under either one of the two PC/AT-
compatible modes. Later the operating system switches to Symmetric I/O Mode as it enters
The interrupt modes are implemented by a combination of hardware and software. The hardware
and programming specifications for each of these modes are further defined in the following
subsections. BIOS programmers should refer to Appendix A, which includes information about
programming the APIC for Virtual Wire Mode. Operating system programmers should refer to
Appendix B, which provides more information about initializing the APIC for Symmetric I/O
PIC Mode is software compatible with the PC/AT because it actually employs the same hardware
interrupt configuration. As Figure 3-2 illustrates, the hardware for PIC Mode bypasses the APIC
components by using an interrupt mode configuration register (IMCR). This register controls
whether the interrupt signals that reach the BSP come from the master PIC or from the local APIC.
Before entering Symmetric I/O Mode, either the BIOS or the operating system must switch out of
PIC Mode by changing the IMCR.