Conventions Used In This Document; For More Information; Memory Layout Conventions - Intel MultiProcessor Specification

MultiProcessor Specification

1.6 Conventions Used in This Document

Signal names that are followed by the character # represent active low signals. For example,
FERR# is active when at its low-voltage state.
Throughout this document, the Intel 82489DX APIC is referred to as the "discrete APIC." The
term "integrated APIC" is used to refer to an APIC integrated with other system components, such
as the Pentium 735\90 and 815\100 processors. This specification uses the term APIC to refer to
both discrete and integrated versions.
The processors of the Intel486 and Pentium processor family are "little endian" machines. This
means that the low-order byte of a multibyte data item in memory is at the lowest address, while
the high-order byte is at the highest address. Illustrations of data structures in memory show the
lowest addresses at the bottom and the highest addresses at the top of the illustration, as shown in
Figure 1-2. Bit positions are numbered from right to left.
31
ONE-BYTE
31
HIGH-ORDER BITS
In some memory layout descriptions, certain fields are marked RESERVED. Software should
initialize these fields as binary zeros, but should otherwise treat them as having a future, though
unknown effect. SOFTWARE SHOULD AVOID ANY DEPENDENCE ON THE VALUES
IN THE RESERVED FIELDS.

1.7 For More Information

For more information, refer to any of the following documents:
82489DX Advanced Programmable Interrupt Controller (data book), Intel order number
290446
Intel486 Microprocessor Programmer's Reference Manual, Intel order number 240486
Intel Processor Identification with the CPUID Instruction AP-485, Intel order number 241618
Pentium Processor User's Manual, Intel order number 241428
1-4
24 23 16 15
RESERVED
RESERVED
RESERVED
THREE-BYTE FIELD
FIELD
24 23 16 15
Figure 1-2. Memory Layout Conventions
INCREASING
8 7 0
ADDRESSES
0CH
08H
TWO-BYTE FIELD 04H
00H
8 7 0
LOW-ORDER BITS
Version 1.4