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Default Configurations; Symmetric I/O Mode - Intel MultiProcessor Specification

Intel multiprocessor specification
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3.6.2.3

Symmetric I/O Mode

Some MP operating systems operate in Symmetric I/O Mode. This mode requires at least one I/O
APIC to operate. In this mode, I/O interrupts are generated by the I/O APIC. All 8259 interrupt
lines are either masked or work together with the I/O APIC in a mixed mode. See Figure 3-5 for
an overview of Symmetric I/O Mode.
REG.
MARK
LINTIN1
LINTIN0
RESET
ICC BUS
NMI
INTERRUPT INPUTS
SHADED AREAS INDICATE UNUSED CIRCUITS. DOTTED LINE SHOWS INTERRUPT PATH.
The APIC I/O unit has general-purpose interrupt inputs that can be individually programmed to
different operating modes. The I/O APIC interrupt line assignments are system implementation
specific. Refer to Chapter 4 for custom implementations and to Chapter 5 for default
configurations.
The hardware must support a mode of operation
Symmetric I/O mode from PIC or Virtual Wire mode. When
switch to MP operation, it
enables
I/O APIC Redirection Table entries. The hardware must not require any other action on the
part of software to make the transition to Symmetric I/O mode.
Version 1.4
BSP
CPU 1
NMI
INTR
NMI INTR
LOCAL
APIC
1
LINTIN0
LINTIN1
LINTIN0
EQUIVALENT
Figure 3-5. Symmetric I/O Mode
in which the system can
writes
a 01H to the IMCR register, if that register is implemented, and
Hardware Specification
AP1
AP2
CPU 2
CPU 3
NMI INTR
LOCAL
LOCAL
APIC
APIC
2
LINTIN1
LINTIN0
8259A-
INTR
PICS
switch easily to
the
operating system is ready to
3
LINTIN1
I/O
APIC
3-11

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