Symmetric I/O Mode
Some MP operating systems operate in Symmetric I/O Mode. This mode requires at least one I/O
APIC to operate. In this mode, I/O interrupts are generated by the I/O APIC. All 8259 interrupt
lines are either masked or work together with the I/O APIC in a mixed mode. See Figure 3-5 for
an overview of Symmetric I/O Mode.
SHADED AREAS INDICATE UNUSED CIRCUITS. DOTTED LINE SHOWS INTERRUPT PATH.
The APIC I/O unit has general-purpose interrupt inputs that can be individually programmed to
different operating modes. The I/O APIC interrupt line assignments are system implementation
specific. Refer to Chapter 4 for custom implementations and to Chapter 5 for default
The hardware must support a mode of operation
Symmetric I/O mode from PIC or Virtual Wire mode. When
switch to MP operation, it
I/O APIC Redirection Table entries. The hardware must not require any other action on the
part of software to make the transition to Symmetric I/O mode.
Figure 3-5. Symmetric I/O Mode
in which the system can
a 01H to the IMCR register, if that register is implemented, and
switch easily to
operating system is ready to