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System Address Space Mapping Entries; System Address Space Entry - Intel MultiProcessor Specification

Intel multiprocessor specification
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MultiProcessor Specification
4.4.1

System Address Space Mapping Entries

System Address Space Mapping entries define the system addresses that are visible on a particular
bus. Each bus defined in the Base Table can have any number of System Address Space Mapping
entries included in the Extended Table. Thus, individual buses can be configured to support
different address ranges, thereby decreasing the amount of bus traffic on a given bus and increasing
the overall system performance. Each consecutive address range that is usable by the operating
system to access devices on a given bus has a System Address Space Mapping entry. Figure
shows the format of each entry, and Table
information.
31
31
4-18
4-14
28
27
24
23
20
19
A D D R ESS LEN G TH
A D D R ES S B A SE
A D D R ESS TYPE
B U S ID
28
27
24
23
20
19
Figure 4-9. System Address Space Entry
explains each field. See also Appendix E, for more
16
15
12
11
8
7
4
3
EN TR Y TYPE
EN TR Y LEN G TH
128
16
15
12
11
8
7
4
3
4-9
0
10H
0C H
08H
04H
00H
0
Version 1.4

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