Agilent Technologies E8362C Service Manual page 133

REAR PANEL
INTERCONNECTS E8363C and E8364C Overall Block Diagram
(Includes Options UNL and 016)
A1
RPG INVERTER
Service Guide: E8364-90038 KEYPAD
A15 CPU
USB
USB
INTERFACE
M ICRO CONTROLLER
RS-232 RS-232 PORT
INTERFACE
A3 FRONT PANEL INTERFACE
PARALLEL PORT EEPROM
PARALLEL
INTERFACE
PCI BUS
MAIN
CPU
GPIB PORT
GPIB
INTERFACE
ROM RAM
10/100 BASE-T
LAN
ETHERNET
VGA
VIDEO PROCESSOR
VGA
INTERFACE
VIDEO RAM
A41 HARD A14 SYSTEM MOTHERBOARD
DISK DRIVE
USB
USB x 4
INTERFACE
A4
POWER
LINE IN
SUPPLY
A10 FREQUENCY REFERENCE
10 MHz
W33 200 Hz 211
EXT REF IN J2
10 MHz
B0 1.0416 MHz
96
100 MHz
212
215
ƒ 2 5
10 MHz
HIGH STAB 12
OCXO 8.333 MHz
B1-25
DAC B1 - 25
2nd LO x4
99.50 MHz
500 kHz 33.1667 MHz
10 MHz L 218
20 ƒ I R 3
W34 J3
EXT REF OUT
10 MHz J4
217 214
5 MHz
REF B0
5 MHz
J10 4 MHz
2 200 Hz 213
TO A9
J11
(OPTION
PHASE LOCK REF
080)
J12
N/C
20 MHz
5
20 MHz
REF 216
J5
W31
W32
J5
A11 PHASE LOCK
40 MHz
COUNTER
20 MHz 15 MHz
B1 - 25
700 kHz 8.333 MHz 16.667 MHz
J6
ƒ
6 MHz
312 314 316
B0
311
AQUIRE: ON
NC
DELAY COMP
313
NC
RAMP CAL
317 315
318
GND
2.5 GHz OFFSET
20 MHz
LOCAL PRETUNE: 30 kHz
REF IN DIGITAL PRETUNE RAMP
DIGITAL
SWEEP: 100 Hz
BUS
ANALOG RAMP
POWER
BUS
A16 TEST SET
PORT 1
MOTHERBOARD
BIAS
INPUT
DC BIAS 1
PORT 2
BIAS
INPUT
DC BIAS 2
POWER
BUS
TO
TRIGGER OUT
TRIGGER OUT
A35, A17, A18, A20,
A22, A36, A37
TRIGGER IN
LOCAL
DIGITAL BUS
AUX IO
AUX O I
INTERFACE
TEST SET IO
TEST SET O I
INTERFACE
HANDLER O I
HANDLER O I
INTERFACE
s1
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2 January 2008
A2 TOUCHSCREEN USB
DISPLAY & CONTROLLER BOARD
DISPLAY
CONTROL
USB
A6 SIGNAL PROCESSING
HUB
ADC MODULE (SPAM)
300 kHz
ADC
SPEAKER
300 kHz
ADC
PCI BUS
PCI
BRIDGE
300 kHz
ADC
DSP
300 kHz
ADC
RAM
IF Calibration
Signal
POWER BUS
LOCAL DIGITAL BUS
TO A8, A9, A11, A12, A16
HIGH DENSITY DATA BUS
POWER BUS
LOCAL DIGITAL BUS
MIXED POWER AND CONTROL SIGNALS
SERIAL TEST BUS NODES
Bx = ACTIVE SOURCE BAND
A8 FRACTIONAL-N SYNTHESIZER A17 L.O. MULTIPLIER/AMPLIFIER
B3-25 BIAS/RF
ALC 1 1
1.5 - 3.0 GHz
416
LOCAL VCO
413 412 3 GHz 1.5 GHz
DIGITAL BUS
B2 B2-25 W19
2
B2-25
POWER J106
B0-1
BUS
1 GHz
FRAC-N
W20
LOGIC B0-1 B0-1
5 MHz REF J105 J101
2250 MHz
VCO
415 417 2.4 GHz 750 MHz
1V/GHz L
(TO A12, A16) R I
FRAC-N ALC
LOGIC
414 418
Level
411 Adjust
+5V REF
FROM FROM FROM
A16 A16 A16
A12 SOURCE 20
LOCAL
DIGITAL BUS
SOURCE 10
POWER
BUS 5.25 GHz 11 GHz
TO A13
(OPTION 080)
FM 8.0 GHz
YTO
B4-25
3-10 GHz
B4-25
YTO TUNE
B0-3
117 B0-3
3 GHz
R ALC
I
L
113 112
3.8 GHz
SLOPE
COMPENSATION
PMYO 114
1V/GHz 111
3.8 GHz
118 (FROM A11)
115
DAC
TEMP COMP
116
POWER DAC
DAC
A35 RECEIVER MOTHERBOARD
W25
J3
A
W26
J4
R1
To
A
2nd LO a Phase Lock
A31 RECEIVER A
J5 W27 8.333 MHz
L
R2 0° I R
B1-25
W28 B0
J6 41.667
90° I R
B kHz L
1.0416 MHz
2nd LO b
To
Phase Lock R1
2nd LO a
A32 RECEIVER R1
8.333 MHz
L
0° I R
B1-25
B0
90°
41.667 I R
L
kHz
1.0416 MHz
2nd LO b
To
Phase Lock R2
2nd LO a
A33 RECEIVER R2
8.333 MHz
L
0° I R
B1-25
B0
41.667 90° I R
kHz L
To 2nd LO a x 4
1.0416 MHz
B0 1.000 MHz 0°
B1 - 25 8.29167 MHz 0° 2nd LO b
W29 J2
4
To
To 2nd LO b x 4 B
2nd LO a Phase Lock
B0 1.000 MHz 9 0°
B1 - 25 8.29167 MHz 9 0° A34 RECEIVER B
8.333 MHz
L
0° I R
A
B1-25
W30 J50 R1
PHASE PHASE
LOCK LOCK B0
MUX R2 41.667 90° I R
MUX
kHz L
1.0416 MHz
B
2nd LO b
J502
FROM A13
(OPTION 080)
10 (LOMA 10)
LOMA10
11 GHz
B0-3
B4-25 3.0 - 3.8 GHz
3.8 - 4.8 GHz B4 - 7, 11, 19 - 20
X2 X2
6.0 - 7.6 GHz
B8 -10, 12 - 18, 21 - 25
4.8 - 6.0 GHz
X2
7.6 - 10.0 GHz
A16 TEST SET MOTHERBOARD
A21 SOURCE MULTIPLIER/
AMPLIFIER 50 (SOMA 50)
4 4
B16-25
W1
0.01-20 GHz
MULTIPLIER/AMPLIFIER 20 (MA 20) R1
R2
11 GHz
B0-10 23 GHz
B11-25
15 GHz 10.0-12.8 GHz
12.8 - 16.0 GHz
X2
16.0 - 20.0 GHz
A49 IF MULTIPLEXER MIXER BIAS
A27 A FIRST
CONVERTER
3 MHz (MIXER)
B0-15
B0
+ 15 dB 40 MHz
J103
W41 J101 W21 IF
I I
+ 15 dB B0 = 1.0416 MHz
B1-25
B1 - 25 = 8.333 MHz
B16-25
50
J102
From
Rear Panel
J104
50 (Option H11)
A PULSE IN
A28 R1 FIRST
CONVERTER
3 MHz (MIXER)
B0-15
B0
+ 15 dB 40 MHz
W42 J203 J201 W22
IF
I I
+ 15 dB
B0 = 1.0416 MHz
B1-25
B1 - 25 = 8.333 MHz
B16-25 50
J202
From
Rear Panel
J204
50 (Option H11)
R1 PULSE IN
A29 R2 FIRST
CONVERTER
3 MHz
(MIXER)
B0-15
B0
+ 15 dB + 15 dB
40 MHz
W43 J303 J301 W23 IF
I
+ 15 dB + 15 dB B0 = 1.0416 MHz
B1-25 B1 - 25 = 8.333 MHz
B16-25 50
J302
From
Rear Panel
J304
50 (Option H11)
R2 PULSE IN
A30 B FIRST
CONVERTER
(MIXER)
3 MHz
B0-15
B0
+ 15 dB 40 MHz
W44 J403 J401 W24 IF
I
+ 15 dB B0 = 1.0416 MHz
B1-25 B1 - 25 = 8.333 MHz
B16-25
50
J402
From
Rear Panel
J404
50 (Option H11)
B PULSE IN
+5V
P1 J1
FROM FROM
W36
A16 A16
FROM
A16 FROM A16J15
A18 MULTIPLIER/AMPLIFIER A19 SPLITTER
MULTIPLIER/AMPLIFIER 20 (MA 20)
2 2
11 GHz
B0-10, 16 - 18 23 GHz 0.01-20
W17 W17 W17
W18
GHz
B11 - 15, 19 - 25
15.0 GHz 10.0-12.8 GHz
12.8 - 16.0 GHz
X2
16.0 - 20.0 GHz
516
511
-15V REF
517 FROM
+9V REF FROM
A16
A16
518
+15V REF
A22 SWITCH
SPLITTER
E8364B ONLY
40-50 GHz
5 5
X2
50
20.0-25.6 GHz
B23-25 W2
50
25.6-32.0 GHz 45 GHz
X2
B0-15
32.0-40.0 GHz
B16-22
SOMA 50 SOURCE ALC
817
DRIVE
711
W39
BREAKPOINT 1
712
BREAKPOINT 2
714 FROM
617
OFFSET A16
R1 R1 R1 611
LOG AMP 612
614
R2 R2 R2 716 1V/GHz
(FROM A11)
615 717 613
TEMP COMP
616
SLOPE COMP
718
618
PRELEVEL DAC
POWER DAC
715
+10V REF
MA 20 LO ALC
811
-10V REF
512
812
POWER DAC +1.78V BIAS REF
513
TO 814
+10V REF
A18
713 514
1V/GHz 815
-1.25V BIAS REF
(FROM A11)
816
+5V REF
515
813
SLOPE COMP PHASE LOCK IF DET
818
DET VOLTAGE OUT
LO
L L RF RF
R R
OPTION 016
A43 STEP
ATTEN
W47 W45
TO FROM
A27 A25
LO
0-35 dB
FROM
A16
L L RF RF
R R
LO
L
RF
R
W40 W14
LO
L RF
R
OPTION 016
A44 STEP
ATTEN
W48 W46
TO FROM
A30 A26
0-35 dB
FROM
A16
3 3
A20 L.O. DISTRIBUTION
ASSY (LODA)
W11
A
W15
W12
R1
W16
W13
R2
W14
B
FROM
A16
A23 DETECTOR
W3 W7
W37
A24 DETECTOR
W4
W8
W38
A25
TEST PORT
COUPLER
W5
OPTION UNL
DC BIAS 1
A36 STEP A38
W9
ATTEN BIAS TEE
W51 W53 W55
FROM 0-60 dB
A16
A26
TEST PORT
COUPLER
W6
OPTION UNL
DC BIAS 2
A37 STEP A39
ATTEN BIAS TEE
W10
W52 W54 W56
FROM FROM FROM 0-60 dB
A16 A16 A16
FRONT PANEL
INTERCONNECTS
USB x 2
PORT 1
PORT 2