AMD Geode SC3200 Data Book page 66

32581C
3.4.17 Debug Monitoring Interface Signals
Signal Name Ball No.
FPCICLK B18
F_AD7 A18
F_AD6 A20
F_AD5 C19
F_AD4 C18
F_AD3 C20
F_AD2 D20
F_AD1 A21
F_AD0 C21
F_C/BE3# C17
F_C/BE2# D17
F_C/BE1# B17
F_C/BE0# D21
F_FRAME# A22
F_IRDY# B20
F_STOP# U29
F_DEVSEL# V31
F_GNT0# U31
F_TRDY# U30
INTR_O D22
SMI_O B21
3.4.18 JTAG Interface Signals
Signal Name Ball No.
TCK E31
TDI F29
TDO E30
TMS F28
66
Type Description
O Fast-PCI Bus Monitoring Signals. When enabled, this
group of signals provides for monitoring of the internal
O
Fast-PCI bus for debug purposes. To enable, pull up
O
FPCI_MON (ball A4).
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O CPU Core Interrupt. When enabled, this signal provides
for monitoring of the internal GX1 core INTR signal for
debug purposes. To enable, pull up FPCI_MON (ball A4).
O System Management Interrupt. This is the input to the
GX1 core. When enabled, this signal provides for moni-
toring of the internal GX1 core SMI# signal for debug pur-
poses. To enable, pull up FPCI_MON (ball A4).
Type Description
I JTAG Test Clock. This signal has an internal weak pull-
up resistor.
I JTAG Test Data Input. This signal has an internal weak
pull-up resistor.
O JTAG Test Data Output
I JTAG Test Mode Select. This signal has an internal
weak pull-up resistor.
Signal Definitions
ACK#+TFTDE
PD7+TFTD13
PD6+TFTD1
PD5+TFTD11
PD4+TFTD10
PD3+TFTD9
PD2+TFTD8
PD1+TFTD7
PD0+TFTD6
SLCT+TFTD15
PE+TFTD14
BUSY/WAIT#+
ERR#+TFTD4+
STB#/WRITE#+
TFTD17
SLIN#/ASTRB#+
TFTD16
AC97_RST#
GPIO16+
PC_BEEP
SDATA_IN
BIT_CLK
AFD#/DSTRB#+
INIT#+TFTD5+
AMD Geode™ SC3200 Processor Data Book
Mux
TFTD3
TFTD2
Mux
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