Signal Definitions
3.4.9
IDE Interface Signals (Continued)
Signal Name
Ball No.
IDE_IORDY0
AD1
IDE_IORDY1
B29
IDE_DREQ0
AC4
IDE_DREQ1
C31
IDE_DACK0#
AD4
IDE_DACK1#
C30
IRQ14
AF1
IRQ15
AJ8
3.4.10
Universal Serial Bus (USB) Interface Signals
Signal Name
Ball No.
POWER_EN
AH1
OVER_CUR#
AF4
DPOS_PORT1
A28
DNEG_PORT1
A29
DPOS_PORT2
B27
DNEG_PORT2
B28
DPOS_PORT3
A26
DNEG_PORT3
A27
1.
A 15K ohm pull-down resistor is required on all ports (even if unused).
AMD Geode™ SC3200 Processor Data Book
Type
Description
I
I/O Ready Channels 0 and 1. When de-asserted, these
signals extend the transfer cycle of any host register
I
access if the required device is not ready to respond to
the data transfer request.
Note:
If selected as IDE_IORDY0 or IDE_IORDY1
function(s) but not used, then signal(s) should be
tied high.
I
DMA Request Channels 0 and 1. The IDE_DREQ sig-
nals are used to request a DMA transfer from the
I
SC3200. The direction of transfer is determined by the
IDE_IOR/IOW signals.
Note:
If selected as IDE_DREQ0/ IDE_DREQ1 func-
tion but not used, tie IDE_DREQ0/IDE_DREQ1
low.
O
DMA Acknowledge Channels 0 and 1. The
IDE_DACK# signals acknowledge the DREQ request to
O
initiate DMA transfers.
I
Interrupt Request Channels 0 and 1. These input sig-
nals are edge-sensitive interrupts that indicate when the
I
IDE device is requesting a CPU interrupt service.
Note:
If selected as IRQ14/IRQ15 function but not
used, tie IRQ14/IRQ15 low.
Type
Description
O
Power Enable. This signal enables the power to a self-
powered USB hub.
I
Overcurrent. This signal indicates that the USB hub has
detected an overcurrent on the USB.
I/O
USB Port 1 Data Positive for Port 1.
I/O
USB Port 1 Data Negative for port 1.
I/O
USB Port 2 Data Positive for Port 2.
I/O
USB Port 2 Data Negative for Port 2.
I/O
USB Port 3 Data Positive for Port 3.
I/O
USB Port 3 Data Negative for Port 3.
32581C
GPIO10+DSR2#+
GPIO8+CTS2#
+SDTEST5
GPIO7+RTS2#
+SDTEST0
GPIO11+RI2#
1
1
1
1
1
1
Mux
TFTD11
SDTEST1
TFTD8
TFTD0
TFTD1
Mux
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