Table 6-9. Device Power Management Programming Summary - AMD Geode SC3200 Data Book

32581C
6.2.10.4 Power Management Programming Summary
Table 6-9 provides a programming register summary for the
power management timers, traps, and functions. For com-

Table 6-9. Device Power Management Programming Summary

Device Power
Management Resource
Global Timer Enable
Keyboard / Mouse Idle Timer
Parallel / Serial Idle Timer
Floppy Disk Idle Timer
1
Video Idle Timer
2
VGA Timer
Primary Hard Disk Idle Timer
Secondary Hard Disk Idle Timer
User Defined Device 1 Idle
Timer
User Defined Device 2 Idle
Timer
User Defined Device 3 Idle
Timer
Global Trap Enable
Keyboard / Mouse Trap
Parallel / Serial Trap
Floppy Disk Trap
Video Access Trap
Primary Hard Disk Trap
Secondary Hard Disk Trap
User Defined Device 1 Trap
User Defined Device 2 Trap
User Defined Device 3 Trap
General Purpose Timer 1
General Purpose Timer 2
Suspend Modulation
Video Speedup
IRQ Speedup
1. This function is used for Suspend determination.
2. This function is used for SoftVGA.
164
Located at F0 Index xxh Unless Otherwise Noted
Enable Configuration
80h[0] N/A
81h[3] 93h[1:0]
81h[2] 93h[1:0]
81h[1] 9Ah[15:0], 93h[7]
81h[7] A6h[15:0]
83h[3] 8Eh[7:0]
81h[0] 98h[15:0], 93h[5]
83h[7] ACh[15:0], 93h[4]
81h[4] A0h[15:0], C0h[31:0],
CCh[7:0]
81h[5] A2h[15:0], C4h[31:0],
CDh[7:0]
81h[6] A4h[15:0], C8h[31:0],
CEh[7:0]
80h[2] N/A
82h[3] 9Eh[15:0] 93h[1:0]
82h[2] 9Ch[15:0], 93h[1:0]
82h[1] 93h[7]
82h[7] N/A
82h[0] 93h[5]
83h[6] 93h[4]
82h[4] C0h[31:0], CCh[7:0]
82h[5] C4h[31:0], CDh[7:0]
82h[6] C8h[31:0], CEh[7:0]
83h[0] 88h[7:0], 89h[7:0], 8Bh[4] F1BAR0+I/O
83h[1] 8Ah[7:0], 8Bh[5,3,2]
96h[0] 94h[15:0], 96h[2:0]
80h[4] 8Dh[7:0], A8h[15:0]
80h[3] 8Ch[7:0]
plete bit information regarding the registers listed in Table
6-9, refer to Section 6.4.1 "Bridge, GPIO, and LPC Regis-
ters - Function 0" on page 188.
Second Level
SMI Status/No Clear
N/A
85h[3]
85h[2]
85h[1]
85h[7]
F1BAR0+I/O
Offset 00h[6]
85h[0]
86h[4]
85h[4]
85h[5]
85h[6]
N/A
86h[3]
86h[2]
86h[1]
86h[7]
86h[0]
86h[5]
F1BAR0+I/O
Offset 04h[2]
F1BAR0+I/O
Offset 04h[3]
F1BAR0+I/O
Offset 04h[4]
Offset 04h[0]
F1BAR0+I/O
Offset 04h[1]
N/A
N/A
N/A
AMD Geode™ SC3200 Processor Data Book
Core Logic Module
Second Level SMI
Status/With Clear
N/A
F5h[3]
F5h[2]
F5h[1]
F5h[7]
F1BAR0+I/O
Offset 02h[6]
F5h[0]
F6h[4]
F5h[4]
F5h[5]
F5h[6]
N/A
F6h[3]
F6h[2]
F6h[1]
F6h[7]
F6h[0]
F6h[5]
F1BAR0+I/O
Offset 06h[2]
F1BAR0+I/O
Offset 06h[3]
F1BAR0+I/O
Offset 06h[4]
F1BAR0+I/O
Offset 06h[0]
F1BAR0+I/O
Offset 06h[1]
N/A
N/A
N/A