AMD Geode SC3200 Data Book page 31

Signal Definitions
Table 3-2.
Ball I/O
No. Signal Name (PU/PD)
C15 V GND
SS
C16 AV GND
SSPLL2
SLCT I
5,2
C17
TFTD15 O
F_C/BE3# O
C18 PD4 I/O
TFTD10 O
F_AD4 O
5,2 PD5 I/O
C19
TFTD11 O
F_AD5 O
5,2 PD3 I/O
C20
TFTD9 O
F_AD3 O
PD0 I/O
5,2
C21
TFTD6 O
F_AD0 O
C22 V PWR
IO
C23 NC ---
C24 NC ---
C25 V PWR
IO
C26 INTB# I
(PU
22.5
C27 AV GND
SSUSB
AMD Geode™ SC3200 Processor Data Book
BGU481 Ball Assignment - Sorted by Ball Number (Continued)
1
Buffer Power
Type Rail Configuration
--- --- ---
--- --- ---
IN V
3
PMR[23] = 0 and
T IO
(PMR[27] = 0 and
FPCI_MON = 0)
O
3
PMR[23] = 1 and
1/4
(PMR[27] = 0 and
FPCI_MON = 0)
O 3
PMR[23] = 0 and
1/4
(PMR[27] = 1 or
FPCI_MON = 1)
IN , V 3
PMR[23] = 0 and
T IO
O
(PMR[27] = 0 and
14/14
FPCI_MON = 0)
O 3
PMR[23] = 1 and
1/4
(PMR[27] = 0 and
FPCI_MON = 0)
O 3
PMR[23] = 0 and
14/14
(PMR[27] = 1 or
FPCI_MON = 1)
IN , V 3
PMR[23] = 0 and
T IO
O
(PMR[27] = 0 and
14/14
FPCI_MON = 0)
O 3
PMR[23] = 1 and
1/4
(PMR[27] = 0 and
FPCI_MON = 0)
O 3
PMR[23] = 0 and
14/14
(PMR[27] = 1 or
FPCI_MON = 1)
IN , V 3
PMR[23] = 0 and
T IO
O
(PMR[27] = 0 and
14/14
FPCI_MON = 0)
O 3
PMR[23] = 1 and
1/4
(PMR[27] = 0 and
FPCI_MON = 0)
O 3
PMR[23] = 0 and
14/14
(PMR[27] = 1 or
FPCI_MON = 1)
IN , V
3
PMR[23] = 0 and
T IO
O
(PMR[27] = 0 and
14/14
FPCI_MON = 0)
O 3
PMR[23] = 1 and
1/4
(PMR[27] = 0 and
FPCI_MON = 0)
O 3
PMR[23] = 0 and
14/14
(PMR[27] = 1 or
FPCI_MON = 1)
--- --- ---
--- --- ---
--- --- ---
--- --- ---
IN V ---
PCI IO
)
--- --- ---
Ball I/O
No. Signal Name (PU/PD)
C28 GPIO9 I/O
(PU
22.5
DCD2# I
(PU
22.5
IDE_IOW1# O
(PU
22.5
SDTEST2 O
(PU
22.5
C29 V PWR
IO
C30 GPIO7 I/O
(PU
22.5
RTS2# O
(PU
22.5
IDE_DACK1# O
(PU
22.5
SDTEST0 O
(PU
22.5
C31 GPIO8 I/O
(PU
22.5
CTS2# I
(PU
22.5
IDE_DREQ1 I
(PU
22.5
SDTEST4 O
(PU
22.5
D1 AD21 I/O
A21 O
D2 AD22 I/O
A22 O
D3 AD20 I/O
A20 O
D4 AD27 I/O
D3 I/O
D5 AD31 I/O
D7 I/O
D6 PCICLK1 O
LPC_ROM I
(PD
100
D7 V GND
SS
D8 FRAME# I/O
(PU
22.5
D9 IOR# O
DOCR# O
GPIO14 I/O
(PU
22.5
32581C
1
Buffer Power
Type Rail Configuration
IN , V PMR[18] = 0 and
TS IO
) PMR[8] = 0
O
1/4
IN PMR[18] = 1 and
TS
) PMR[8] = 0
O PMR[18] = 0 and
1/4
) PMR[8] = 1
O PMR[18] = 1 and
2/5
) PMR[8] = 1
--- --- ---
IN , V PMR[17] = 0 and
TS IO
) PMR[8] = 0
O
1/4
O PMR[17] = 1 and
1/4
) PMR[8] = 0
O PMR[17] = 0 and
1/4
) PMR[8] = 1
O PMR[17] = 1 and
2/5
) PMR[8] = 1
IN , V PMR[17] = 0 and
TS IO
) PMR[8] = 0
O
8/8
IN PMR[17] = 1 and
TS
) PMR[8] = 0
IN PMR[17] = 0 and
TS1
) PMR[8] = 1
O PMR[17] = 1 and
2/5
) PMR[8] = 1
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
IN ,
PCI
O
PCI
IN , V Cycle Multiplexed
PCI IO
O
PCI
IN ,
PCI
O
PCI
O V ---
PCI IO
IN Strap (See Table 3-
STRP
) 4 on page 44.)
--- --- ---
IN , V ---
PCI IO
)
O
PCI
O V PMR[21] = 0 and
3/5 IO
PMR[2] = 0
O PMR[21] = 0 and
3/5
PMR[2] = 1
IN , PMR[21] = 1 and
TS
) PMR[2] = 1
O
3/5
31