Signal Descriptions; System Interface - AMD Geode SC3200 Data Book

Signal Definitions
3.4

Signal Descriptions

Information in the tables that follow may have duplicate information in multiple tables. Multiple references all contain identi-
cal information.
3.4.1

System Interface

Signal Name Ball No.
CLKSEL1 AF3
CLKSEL0 B8
CLKSEL3 P30
CLKSEL2 D29
BOOT16 C8
LPC_ROM D6
TFT_PRSNT P29
FPCI_MON A4
DID1 C6
DID0 C5
POR# AH9
AMD Geode™ SC3200 Processor Data Book
Type Description
I Fast-PCI Clock Selects. These strap signals are used to
set the internal Fast-PCI clock.
00 = 33.3 MHz
01 = 48 MHz
10 = 66.7 MHz
11 = 33.3 MHz
During system reset, an internal pull-down resistor of 100
KΩ exists on these balls. An external pull-up or pull-down
resistor of 1.5 KΩ must be used.
I Maximum Core Clock Multiplier. These strap signals
are used to set the maximum allowed multiplier value for
the core clock.
During system reset, an internal pull-down resistor of 100
KΩ exists on these balls. An external pull-up or pull-down
resistor of 1.5 KΩ must be used.
I Boot ROM is 16 Bits Wide. This strap signal enables
the optional 16-bit wide Sub-ISA bus.
During system reset, an internal pull-down resistor of 100
KΩ exists on these balls. An external pull-up or pull-down
resistor of 1.5 KΩ must be used.
I LPC_ROM. This strap signal forces selecting of the LPC
bus and sets bit F0BAR1+I/O Offset 10h[15], LPC ROM
Addressing Enable. It enables the SC3200 to boot from a
ROM connected to the LPC bus.
During system reset, an internal pull-down resistor of 100
KΩ exists on these balls. An external pull-up or pull-down
resistor of 1.5 KΩ must be used.
I TFT Present. A strap used to select multiplexing of TFT
signals at power-up. Enables using TFT instead of Paral-
lel Port, ACB1, and GPIO17.
During system reset, an internal pull-down resistor of 100
KΩ exists on these balls. An external pull-up or pull-down
resistor of 1.5 KΩ must be used.
I Fast-PCI Monitoring. The strap on this ball forces selec-
tion of Fast-PCI monitoring signals. For normal operation,
strap this signal low using a 1.5 KΩ resistor. The value of
this strap can be read on the MCR[30].
I Device ID. Together, the straps on these signals define
the system-level chip ID.
I
The value of DID1 can be read in the MCR[29]. The
value of DID0 can be read in the MCR[31].
DID0 and DID1 must have a pull-up resistor of 1.5 KΩ.
I Power On Reset. POR# is the system reset signal gen-
erated from the power supply to indicate that the system
should be reset.
32581C
Mux
SOUT1
RD#
SYNC
SOUT2
ROMCS#
PCICLK1
SDATA_OUT
PCICLK0
GNT1#
GNT0#
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