Table 6-14. F0: Pci Header/Bridge Configuration Registers For Gpio And Lpc Support Summary - AMD Geode SC3200 Data Book

32581C
6.3.2 Register Summary
The tables in this subsection summarize the registers of
the Core Logic module. Included in the tables are the regis-
ter's reset values and page references where the bit for-
mats are found.
Table 6-14. F0: PCI Header/Bridge Configuration Registers
Width
F0 Index (Bits) Type
00h-01h 16 RO
02h-03h 16 RO
04h-05h 16 R/W
06h-07h 16 R/W
08h 8 RO
09h-0Bh 24 RO
0Ch 8 R/W
0Dh 8 R/W
0Eh 8 RO
0Fh 8 RO
10h-13h 32 R/W
14h-17h 32 R/W
18h-2Bh --- ---
2Ch-2Dh 16 RO
2Eh-2Fh 16 RO
30h-3Fh --- ---
40h 8 R/W
41h 8 R/W
42h --- ---
43h 8 R/W
44h 8 R/W
45h --- ---
46h 8 R/W
47h 8 R/W
48h-4Bh --- ---
4Ch-4Fh 32 R/W
50h 8 R/W
51h 8 R/W
52h 8 R/W
53h 8 R/W
54h-59h --- ---
5Ah 8 R/W
5Bh 8 R/W
5Ch 8 R/W
5Dh 8 R/W
5Eh-5Fh --- ---
60h-63h 32 R/W
64h-6Bh --- ---
174
for GPIO and LPC Support Summary
Name
Vendor Identification Register
Device Identification Register
PCI Command Register
PCI Status Register
Device Revision ID Register
PCI Class Code Register
PCI Cache Line Size Register
PCI Latency Timer Register
PCI Header Type Register
PCI BIST Register
Base Address Register 0 (F0BAR0) — Sets the base address for
the I/O mapped GPIO Runtime and Configuration Registers (sum-
marized in Table 6-15).
Base Address Register 1 (F0BAR1) — Sets the base address for
the I/O mapped LPC Configuration Registers (summarized in
Table 6-16)
Reserved
Subsystem Vendor ID
Subsystem ID
Reserved
PCI Function Control Register 1
PCI Function Control Register 2
Reserved
PIT Delayed Transactions Register
Reset Control Register
Reserved
PCI Functions Enable Register
Miscellaneous Enable Register
Reserved
Top of System Memory
PIT Control/ISA CLK Divider
ISA I/O Recovery Control Register
ROM/AT Logic Control Register
Alternate CPU Support Register
Reserved
Decode Control Register 1
Decode Control Register 2
PCI Interrupt Steering Register 1
PCI Interrupt Steering Register 2
Reserved
ACPI Control Register
Reserved
Core Logic Module - Register Summary
Note: Function 4 (F4) is for Video Processor support
(although accessed through the Core Logic PCI
configuration registers). Refer to Section 7.3.1
"Register Summary" on page 327 for details.
AMD Geode™ SC3200 Processor Data Book
Reset Reference
Value (Table 6-29)
100Bh Page 188
0500h Page 188
000Fh Page 188
0280h Page 189
00h Page 190
060100h Page 190
00h Page 190
00h Page 190
80h Page 190
00h Page 190
00000001h Page 190
00000001h Page 190
00h Page 190
100Bh Page 190
0500h Page 190
00h Page 190
39h Page 191
00h Page 191
00h Page 192
02h Page 192
01h Page 192
00h Page 193
FEh Page 193
00h Page 193
00h Page 193
FFFFFFFFh Page 194
7Bh Page 194
40h Page 194
98h Page 195
00h Page 195
00h Page 196
01h Page 196
20h Page 196
00h Page 197
00h Page 197
00h Page 197
00000000h Page 198
00h Page 198