Ucf Location Constraints; Analog To Digital Converter (Adc); Interface; Spi Control Interface - Xilinx MIcroBlaze Development Spartan-3E 1600E Kit User Manual

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UCF Location Constraints

Figure 10-5
including the I/O pin assignment and I/O standard used.

Analog to Digital Converter (ADC)

The LTC1407A-1 provides two ADCs. Both analog inputs are sampled simultaneously
when the AD_CONV signal is applied.

Interface

Table 10-3
SPI_MISO, and SPI_SCK signals are shared with other devices on the SPI bus. The
DAC_CS signal is the active-Low slave select input to the DAC. The DAC_CLR signal is
the active-Low, asynchronous reset input to the DAC.
Table 10-3: ADC Interface Signals

SPI Control Interface

Figure 10-6
When the AD_CONV signal goes High, the ADC simultaneously samples both analog
channels. The results of this conversion are not presented until the next time AD_CONV is
asserted, a latency of one sample. The maxim sample rate is approximately 1.5 MHz.
The ADC presents the digital representation of the sampled analog values as a 14-bit, two's
complement binary value.
MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide
UG257 (v1.1) December 5, 2007
provides the User Constraint File (UCF) constraints for the amplifier interface,
NET "SPI_MOSI" LOC = "T4"
NET "AMP_CS" LOC = "N7"
NET "SPI_SCK" LOC = "U16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
NET "AMP_SHDN" LOC = "P7"
NET "AMP_DOUT" LOC = "E18" | IOSTANDARD = LVCMOS33 ;
Figure 10-5: UCF Location Constraints for the DAC Interface
lists the interface signals between the FPGA and the ADC. The SPI_MOSI,
Signal FPGA Pin
SPI_SCK U16 FPGA ADC Clock
AD_CONV P11 FPGA ADC Active-High shutdown and reset.
SPI_MISO N10 FPGA ADC Serial data: Master Input, Serial Output. Presents
provides an example SPI bus transaction to the ADC.
| IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
| IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
| IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
Direction
the digital representation of the sample analog
values as two 14-bit two's complement binary
values.
Analog to Digital Converter (ADC)
UG570_10_05_060706
Description
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