Chapter 4: FPGA Configuration Options
Table 4-1: MicroBlaze Development Kit Board Configuration Mode Jumper Settings
PROG Push Button
The PROG push button, shown in
the selected configuration memory source. Press and release this button to restart the
FPGA configuration process at any time.
DONE Pin LED
The DONE pin LED, shown in
successfully configured. If this LED is not lit, then the FPGA is not configured.
26
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(Header J30 in
Configuration
Mode Pins
Mode
M2:M1:M0
BPI Down
011
(see
Chapter 11,
"Intel
StrataFlash
Parallel NOR
Flash
PROM")
JTAG
101
Figure
4-2)
FPGA Configuration Image Source
StrataFlash parallel Flash PROM,
starting at address 0x1FF_FFFF and
decrementing through address
space. The CPLD controls address
lines A[24:20] during BPI
configuration.
Downloaded from host via USB-
JTAG port
Figure 4-2, page
24, forces the FPGA to reconfigure from
Figure 4-2, page
24, lights whenever the FPGA is
MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide
Jumper Settings
M0
M1
M2
J30
M0
M1
M2
J30
UG257 (v1.1) December 5, 2007
R