Xilinx MIcroBlaze Development Spartan-3E 1600E Kit User Manual page 87

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Table 11-1: FPGA-to-StrataFlash Connections
MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide
UG257 (v1.1) December 5, 2007
StrataFlash
Category Signal Name
SF_A24
SF_A23
SF_A22
SF_A21
SF_A20
SF_A19
SF_A18
SF_A17
SF_A16
SF_A15
SF_A14
SF_A13
SF_A12
SF_A11
SF_A10
SF_A9
SF_A8
SF_A7
SF_A6
SF_A5
SF_A4
SF_A3
SF_A2
SF_A1
SF_A0
FPGA Pin
Number
A11 Shared with XC2C64A CPLD. The CPLD
actively drives these pins during FPGA
N11
configuration, as described in
V12
"XC2C64A CoolRunner-II
connects to FPGA user-I/O pins. SF_A24 is the
V13
same as FX2 connector signal FX2_IO<32>.
T12
V15 Connects to FPGA pins A[19:0] to support the
BPI configuration.
U15
T16
U18
T17
R18
T18
L16
L15
K13
K12
K15
K14
J17
J16
J15
J14
J12
J13
H17
StrataFlash Connections
Function
Chapter 16,
CPLD". Also
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