Chapter 12: Spi Serial Flash; Ucf Location Constraints; Configuring From Spi Flash; Setting The Fpga Mode Select Pins - Xilinx MIcroBlaze Development Spartan-3E 1600E Kit User Manual

Chapter 12: SPI Serial Flash

UCF Location Constraints

Figure 12-2
pin assignment and the I/O standard used.

Configuring from SPI Flash

To configure the FPGA from SPI Flash, the FPGA mode select pins must be set
appropriately and the SPI Flash must contain a valid configuration image.

Setting the FPGA Mode Select Pins

Set the FPGA configuration mode pins for SPI mode, as shown in
of the configuration mode jumpers (J30) appears in
92
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provides the UCF constraints for the SPI serial Flash PROM, including the I/O
# some connections shared with SPI Flash, DAC, ADC, and AMP
NET "SPI_MISO" LOC = "N10" | IOSTANDARD = LVCMOS33 ;
NET "SPI_MOSI" LOC = "T4"
NET "SPI_SCK" LOC = "U16" | IOSTANDARD = LVCMOS33
NET "SPI_SS_B" LOC = "U3"
NET "SPI_ALT_CS_JP11" LOC = "R12" | IOSTANDARD = LVCMOS33
Figure 12-2: UCF Location Constraints for SPI Flash Connections
Select SPI Mode using
the Jumper Settings table.
(Remove top jumper and
insert the bottom two)
Spartan-3E
Development Board
(Lights up when FPGA successfully configured)
(When programming SPI Flash using the XSPI
utility, insert jumper to hold PROG_B pin low.)
Figure 12-3: Configuration Options for SPI Mode
| IOSTANDARD = LVCMOS33
| IOSTANDARD = LVCMOS33
(XSPI Programming)
DONE Pin LED
Jumper JP8 (XPSI)
PROG_B Push Button Switch
(Press and release to
restart configuration.)
Figure
MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide
| SLEW = SLOW | DRIVE = 6 ;
| SLEW = SLOW | DRIVE = 6 ;
| SLEW = SLOW | DRIVE = 6 ;
| SLEW = SLOW | DRIVE = 6 ;
UG257_12_02_060806
Header J12
Jumper J11
UG257_12_03_061506
Figure 12-4. The location
12-3.
UG257 (v1.1) December 5, 2007
R