Part 3.5: Hdmi Output Interface - Alinx AX7A200 Manual

ARTIX-7 FPGA Development Board AX7A200 User Manual
PCIex2 Interface Pin Assignment:
Signal Name
PCIE_RX0_P
PCIE_RX0_N
PCIE_RX1_P
PCIE_RX1_N
PCIE_TX0_P
PCIE_TX0_N
PCIE_TX1_P
PCIE_TX1_N
PCIE_CLK_P
PCIE_CLK_N

Part 3.5: HDMI output interface

HDMI output interface, select Silion Image's SIL9134 HDMI (DVI)
encoding chip, support up to 1080P@60Hz output, support 3D output.
The IIC configuration interface of SIL9134 is also connected to the IO of
the FPGA. The SIL9134 is initialized and controlled by FPGA programming.
The hardware connection of the HDMI output interface is shown in Figure
3-5-1.
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FPGA Pin
PCIE Channel 0 Data Receive Positive
D9
PCIE Channel 0 Data Receive Negative
C9
PCIE Channel 1 Data Receive Positive
B10
PCIE Channel 1 Data Receive Negative
A10
PCIE Channel 0 Data Transmit Positive
D7
PCIE Channel 0 Data Transmit Negative
C7
PCIE Channel 1 Data Transmit Positive
B6
PCIE Channel 1 Data Transmit Negative
A6
F10
E10
Figure 3-5-1: HDMI Output Schematic
Amazon Store:
Sales Email:
Description
PCIE Reference Clock Positive
PCIE Reference Clock Negative
https://www.amazon.com/alinx
rachel.zhou@aithtech.com