Part 3.4: Pcie X2 Interface - Alinx AX7A200 Manual

ARTIX-7 FPGA Development Board AX7A200 User Manual

Part 3.4: PCIe x2 Interface

The AX7A200 FPGA development board provides an industrial-grade
high-speed data transfer PCIe x2 interface (size dimension is PCIex4). The
PCIE card interface conforms to the standard PCIe card electrical
specifications and can be used directly on the x4 PCIe slot of a normal PC.
The transmit and receive signals of the PCIe interface are directly
connected to the GTP transceiver of the FPGA. The four channels of TX and
RX signals are connected to the FPGA in differential signals, and the single
channel communication rate can be up to 5G bit bandwidth. The PCIe
reference clock is provided to the AX7A200 FPGA development board by the
PCIe slot of the PC with a reference clock frequency of 100Mhz.
The design diagram of the PCIe interface of the AX7A200 FPGA
development board is shown in Figure 3-4-1, where the TX transmit signal and
the reference clock CLK signal are connected in AC coupled mode.
40 / 59
Figure 3-4-1: PCIex2 schematic
Figure 3-4-2: PCIex2 on the Carrier Board
Amazon Store:
Sales Email:
https://www.amazon.com/alinx
rachel.zhou@aithtech.com