ARTIX-7 FPGA Development Board AX7A200 User Manual
Figure 3-3-2: SFP interfaces on the Carrier Board
The 1
fiber interface FPGA pin assignment is as follows:
st
Signal Name
SFP1_TX_P
SFP1_TX_N
SFP1_RX_P
SFP1_RX_N
SFP1_TX_DIS
SFP1_LOSS
The 2
fiber interface FPGA pin assignment is as follows:
nd
Signal Name
SFP2_TX_P
SFP2_TX_N
SFP2_RX_P
SFP2_RX_N
SFP2_TX_DIS
SFP2_LOSS
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FPGA PIN
B4
A4
B8
A8
J15
SFP1 Optical Transfer Disable, active high
H15
SFP1 Optical LOSS, High level means no light
FPGA PIN
D5
C5
D11
C11
H14
SFP2 Optical Transfer Disable, active high
J14
SFP2 Optical LOSS, High level means no light
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Description
SFP1 Data Transfer (Positive)
SFP1 Data Transfer (Negative)
SFP1 Data Receiver (Positive)
SFP1 Data Receiver (Negative)
signal is received
Description
SFP2 Data Transfer (Positive)
SFP2 Data Transfer (Negative)
SFP2 Data Receiver (Positive)
SFP2 Data Receiver (Negative)
signal is received
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