Mitsubishi Electric NZ2FTGN User Manual page 337

Packed process data for outputs
The following indicates the assignment of the QJ71MT91 to the buffer memory and the data structure of the NZ2FT-MT
register.
Address
b15
(offset)
nH NZ2FTS2-8TE
n+1H -
n+2H NZ2FTS1-16TE
n+3H
n+4H
NZ2FTS-60DA4
n+5H
n+6H
n+7H -
n+8H
n+9H
n+AH
NZ2FTS-D62P2
n+BH
n+CH
n+DH
• Process data of the output module is arranged in order of mounting position proximity to the NZ2FT-MT.
• The size of Packed process data of each I/O module depends on the I/O module. ( Page 323 Data width used by the I/
O module)
• There is no assignment for input modules.
• The I/O modules with the Packed process data size of 8 bits or less are assigned next to the previous I/O module.
• The I/O modules with the Packed process data size of 16 bits or more are assigned from the start of the next word.
• Process data of the NZ2FTS4-4TE uses only 4 bits of b0 to b3, and 4 bits of b4 to b7 are allocated for only the area.
QJ71MT91
... b0
NZ2FTS4-4TE
NZ2FTS2-8TE
NZ2FTS2-8TE
NZ2FT-MT
b15
Address
0800H NZ2FTS2-8TE
0801H -
0802H NZ2FTS1-16TE
0803H
0804H
NZ2FTS-60DA4
0805H
0806H
0807H -
0808H
0809H
080AH
NZ2FTS-D62P2
080BH
080CH
080DH
11.8 Access to Process Data
... b0
NZ2FTS4-4TE
NZ2FTS2-8TE
NZ2FTS2-8TE
11 NZ2FT-MT
335
11