Interrupts - Epson Arm S1C31 Series Technical Manual

16.5 Interrupts

The I2C has a function to generate the interrupts shown in Table 16.5.1.
Interrupt Interrupt flag
End of data I2C_nINTF.BYTEENDIF When eight-bit data transfer and the following ACK/
transfer
General call I2C_nINTF.GCIF
address reception
NACK reception I2C_nINTF.NACKIF
STOP condition I2C_nINTF. STOPIF
START condition I2C_nINTF. STARTIF
Error detection I2C_nINTF. ERRIF
Receive buffer full I2C_nINTF. RBFIF
Transmit buffer I2C_nINTF. TBEIF
empty
The I2C provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is sent to the CPU
only when the interrupt flag, of which interrupt has been enabled by the interrupt enable bit, is set. For more infor-
mation on interrupt control, refer to the "Interrupt" chapter.
(1) START condition interrupt
Master mode
Slave mode
SDA
SCL
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
Table 16.5.1 I2C Interrupt Function
NACK transfer are completed
Slave mode only: When the general call address is
received
When a NACK is received
Master mode: When a STOP condition is generated
and the bus free time (t
START conditions has elapsed
Slave mode: When a STOP condition is detected
while the I2C Ch.n is selected as the slave currently
accessed
Master mode: When a START condition is issued
Slave mode: When an address match is detected
(including general call)
Refer to "Error Detection."
When received data is loaded to the receive data
buffer
Master mode: When a START condition is issued or
when an ACK is received from the slave
Slave mode: When transmit data written to the
transmit data buffer is transferred to the shift regis-
ter or when an address match is detected with R/W
bit set to 1
SDA
SCL
TXSTART = 1
Address matching the I2C_nOADR register
1 2
BSY = 1
Seiko Epson Corporation
Set condition
) between STOP and
BUF
BRT + 3
f
CLK_I2Cn
TXSTART = 0
STARTIF = 1
R/W ACK
7 8 9
TR = 0/1 STARTIF = 1
16 I 2 C (I2C)
Clear condition
Writing 1,
software reset
Writing 1,
software reset
Writing 1,
software reset
Writing 1,
software reset
Writing 1,
software reset
Writing 1,
software reset
Reading received
data (to empty the
receive data buffer),
software reset
Writing transmit data
16-17