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16 I
2
C (I2C)
Data receiving operations
Generating a START condition
It is the same as the data transmission in master mode.
Sending slave address
It is the same as the data transmission in master mode. Note, however, that the I2C_nTXD.TXD0 bit must
be set to 1 that represents READ as the data transfer direction to issue a request to the slave to send data.
Receiving data
After the slave address has been sent, the slave device sends an ACK and the first data. The I2C Ch.n sets
the I2C_nINTF.RBFIF bit to 1 after the data reception has completed. Furthermore, the I2C Ch.n returns an
ACK. To return a NACK, such as for a response after the last data has been received, write 1 to the I2C_
nCTL.TXNACK bit before the I2C_nINTF.RBFIF bit is set to 1.
The received data can be read out from the I2C_nRXD register after a receive buffer full interrupt has oc-
curred. The I2C Ch.n pulls down SCL to low and enters standby state until data is read out from the I2C_
nRXD register.
This reading triggers the I2C Ch.n to start subsequent data reception.
Generating a STOP or repeated START condition
It is the same as the data transmission in master mode.
Standby state (SCL = low)
TXSTART = 1
Saddr/R
→
TXD[7:0]
I
2
C bus
S
Saddr/R
TXSTART = 0
STARTIF = 1
TBEIF = 1
NACKIF = 1
NACKIF = 1
NACKIF = 1
Figure 16.4.3.1 Example of Data Receiving Operations in Master Mode
16-8
RXD[7:0]
A
Data 1
A
Data 2
RBFIF = 1
TXSTOP = 1
A
P
TXSTOP = 0
STOPIF = 1
TXSTART = 1
A
Sr
TXSTART = 0
STARTIF = 1
TBEIF = 1
TXSTART = 1
TXSTOP = 1
A
P
S
TXSTART = 0
STARTIF = 1
TXSTOP = 0
TBEIF = 1
STOPIF = 1
Seiko Epson Corporation
TXNACK = 1
→
Data 1
RXD[7:0]
A
Data N
RBFIF = 1
Software bit operations
Operations by I2C (master mode)
S: START condition, Sr: Repeated START condition, P: STOP condition,
A: ACK, A: NACK, Saddr/R: Slave address + R(1), Data n: 8-bit data
TXSTOP = 1
→
→
Data (N-1)
RXD[7:0]
Data N
A
P
RBFIF = 1
TXSTOP = 0
TXNACK = 0
STOPIF = 1
TXSTART = 1
→
RXD[7:0]
Data N
A
Sr
RBFIF = 1
TXSTART = 0
TXNACK = 0
STARTIF = 1
TBEIF = 1
TXSTART = 1
TXSTOP = 1
→
RXD[7:0]
Data N
A
P
S
RBFIF = 1
TXSTART = 0
TXNACK = 0
STARTIF = 1
TBEIF = 1
TXSTOP = 0
STOPIF = 1
Hardware bit operations
Operations by the external slave
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
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