HP Visualize J5000 Supplementary Manual page 63

Table 3-1. Chassis Codes for J5xxx and J7xxx Workstations
Ostat Code FRU
TST 1n26 SYS BD
TST 1n27 SYS BD
TST 1n28 SYS BD
TST 1n29 SYS BD
TST 1n2A SYS BD
TST 1n2B SYS BD
TST 1n2C SYS BD
TST 1n30 SYS BD
WRN 1n31 SYS BD
FLT 1n32 SYS BD
INI 1n3C SYS BD
TST 1n3E SYS BD
TST 1nA0 SYS BD
TST 1nA1 SYS BD
TST 1nA2 SYS BD
TST 1nA3 SYS BD
TST 1nA4 SYS BD
TST 1nA5 SYS BD
TST 1nB1 SYS BD
Chapter 3
Message
CPU n ext intrpt
CPU n itimer test
CPU n multi-media
CPU n shadow reg
CPU n diagnse reg
CPU n rdr test
CPU n bypass test
CPU n start est
CPU n skip est
CPU n bad tst mod
CPU n initialize
CPU n exit est
CPU n fpu tests
CPU n fpu reg tst
CPU n fpu inst
CPU n fpu traps
CPU n fpu misc
CPU n fpu bypass
CPU n TLB RAM tst
Identifying LCD-Indicated Conditions
Description
CPU n is starting its external interrupt
self-test.
CPU n is starting its interval timer
self-test.
CPU n is starting its multi-media
instructions self-test.
CPU n is starting its shadow register
self-test.
CPU n is starting its diagnose register
self-test.
CPU n is starting its remote diagnose
register self-test.
CPU n is starting its integer bypass
operation self-test.
CPU n is starting its early (pre-memory)
self-tests.
CPU n is bypassing its early self-tests to
save time.
CPU n detected an unsupported system
mode.
CPU n is initializing after self-tests.
CPU n finished its early self-tests.
CPU n is starting its floating-point unit
self-tests.
CPU n is starting its floating-point
register self-test.
CPU n is starting its floating-point
instruction self-test.
CPU n is starting its floating-point trap
self-test.
CPU n is starting its floating-point
miscellaneous operations self-test.
CPU n is starting its floating-point
bypassing self-test.
CPU n is starting its TLB register
self-test.
Troubleshooting
57