ABB RELION 630 Series Technical Manual page 74

Section 3
Basic functions
68
Pulse counter (PCGGIO) function in the IED supports unidirectional incremental
counters. That means only positive values are possible. The counter uses a 32 bit
format, that is, the reported value is a 32-bit, signed integer with a range
0...+2147483647. The counter value is stored in semiretain memory.
The reported value to station HMI over the station bus contains Identity, Scaled Value
(pulse count x scale), Time, and Pulse Counter Quality. The Pulse Counter Quality has
four options.
• Invalid (board hardware error or configuration error)
• Wrapped around
• Blocked
• Adjusted
The transmission of the counter value can be done as a service value, that is, the value
frozen in the last integration cycle is read by the station HMI from the database.
PCGGIO updates the value in the database when an integration cycle is finished and
activates the NEW_VAL signal in the function block. This signal can be time tagged,
and transmitted to the station HMI. This time corresponds to the time when the value
was frozen by the function.
The BLOCK and READ_VAL inputs can be connected to blocks, which are intended
to be controlled either from the station HMI or/and the LHMI. As long as the BLOCK
signal is set, the pulse counter is blocked. The signal connected to READ_VAL
performs readings according to the setting of parameter CountCriteria. The signal
must be a pulse with a length >1 second.
The BI_PULSE input is connected to the used input of the function block for the
binary input output module (BIO).
The RS_CNT input is used for resetting the counter.
Each PCGGIO function block has four binary output signals that can be used for event
recording: INVALID, RESTART, BLOCKED and NEW_VAL. These signals and
the SCAL_VAL signal are accessable over IEC 61850.
The INVALID signal is a steady signal and is set if the binary input module, where the
pulse counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not
comprise a complete integration cycle. That is, in the first message after IED start-up,
in the first message after deblocking, and after the counter has wrapped around during
last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There
are two reasons why the counter is blocked.
• The BLOCK input is set
• The binary input module, where the counter input is situated, is inoperative
1MRS757256 F
PML630/Compact Load-Shedding Solution
Technical Manual