Chapter 2: Functional Description; Hardware Architecture - Xilinx Zynq-7000 User Manual

Functional Description
This chapter describes the Zynq®-7000 AP SoC ZC702 Base Targeted Reference Design
(TRD) hardware design, software system, and video demonstration application components.
It also describes how data flows through the various connected IPs and includes
information about the flow of application control.
To build hardware and software for the Base TRD, refer to the Xilinx Zynq-7000 Base
Targeted Reference Design wiki page wiki.xilinx.com/zc702-base-trd.

Hardware Architecture

The block diagram for the Base TRD is shown in
• Processing system (PS)
• Video IPs and custom logic implemented in programmable logic (PL)
Zynq-7000 AP SoC ZC702 Base TRD
UG925 (v6.0) February 21, 2014
Figure 2-1. This design has two parts:
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Chapter 2
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