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Chapter 1: XM101
XM101 Board Technical Description
Figure 1-2
X-Ref Target - Figure 1-2
The XM101 provides four Samtec QSE family connectors which break out a subset of the
FMC HPC signal set, as shown in
The FMC HPC signals are connected as length matched pairs to the QSE connectors.
XM101 board users may loop back these pairs using the kit Samtec loopback cable, or
create their own unique mezzanine board to plug onto the QSE connectors.
Two Silicon Laboratories Si570 serial IIC bus reprogrammable LVDS clock chips are
available.
The Si570 components are connected to an IIC bus switch. The bus switch component
connects to the main IIC bus implemented in the FMC HPC interface, enabling the board's
FPGA to program the clock circuitry on the XM101.
A 2-Kb serial IIC EEPROM is also connected to the IIC interface of the board, providing
non-volatile storage.
10
shows a block diagram of the XM101.
J1 FMC HPC Interface
P1
LA[00:16]
QSE0
HA[00:23]
P3
QSE2
J2
CLK1_M2C_P
J3
CLK1_M2C_N
J4
CLK3_M2C_P
J5
CLK3_M2C_N
Figure 1-2: XM101 Block Diagram
Detailed Description, page
www.xilinx.com
P2
LA[17:33]
QSE1
HB[00:21]
P4
QSE3
IIC BUS SDA, SCL
U3
2 K b
EEPROM
U4 IIC
Switch
SDA_0,
SCL_0
U1
CLK0_M2C_P
Si570
CLK0_M2C_N
SDA_1,
SCL_1
U2
CLK2_M2C_P
Si570
CLK2_M2C_N
UG538_02_010610
11.
FMC XM101 User Guide
UG538 (v1.1) September 24, 2010
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