Xilinx Zynq-7000 User Manual page 12

Table 1-1: Acronyms (Cont'd)
Acronym
EDK Embedded Development Kit
AP SoC All Programmable SoC
FMC FPGA mezzanine card
FPS Frames per second
FSBL First-stage boot loader
GIC General interrupt controller
GUI Graphical user interface
HD High definition
IDE Integrated development environment
IOP Input/output peripherals
IP Intellectual property
JTAG Joint Test Action Group
KFLOPS Kilo floating-point operations per second
NVM Nonvolatile memory
OCM On-chip memory
OS Operating system
PL Programmable logic (inside the Zynq-7000 AP SoC)
PS Processing system
R Read only
RTL Register transfer level
RW Read/write
SC Self clear
SD Secure Digital
SD MMC Secure Digital Multimedia Card
SDK Software Development Kit
SoC System on Chip
TDP Targeted Design Platform
TPG (Video) Test Pattern Generator
TRD Targeted Reference Design
TTC Triple-timer counter
VDMA Video direct memory access
VTC Video timing controller
Zynq-7000 AP SoC ZC702 Base TRD
UG925 (v6.0) February 21, 2014
Definition
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Base TRD Key Features
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