Data Transfer Between Cyclic Tasks Of Several Cpus - Siemens SIMADYN D Manual

2.1.6.4 Data transfer between cyclic tasks of several CPUs

System- and communication configuring D7-SYS - SIMADYN D
Edition 03.2001
Start/end
of a cycle
Task T2
Task T3 Data transfer
via an alternating
buffer system
Fig. 2-5 Signal sensed with delay
Signals are transferred between the CPUs using the MM3, MM4 and
MM11 (SIMADYN D) or CP50M0 (SIMATIC TDC) communication buffer
modules. $ signals are used to handle the connections between function
blocks, which run on different CPUs within the same SIMADYN D station
(menu item "Insert-connection to the operand " in the CFC editor). The
following data are required to configure a $ signal:
• the signal name,
• type
• bus assignment.
The dollar signal type defines whether data transfer is to be
• consistent ("standard") or
• inconsistent ("fast $ signal")
For a fast $ signal, the user (destination) can always access a current
value. The deadtime, generated during signal transfer is then minimal if
the generator (source) and user (destination) are configured in the same
task, and if the tasks are possibly synchronized (refer to Chapter
"Significance and application of the CPU synchronization").
The bus assignment defines whether data is to be transferred via the L
bus or the C bus.
Signal edge
Systemsoftware
t
t
2-19