Closed-loop thyristor current control
Significance of the
fault bits YW1, with
HM1 → YF1
YW1→YF1
Bit 1
Synchronizing voltage not present / failed
→
check the synchronizing voltage connection (hardware)
Erroneous synchronizing voltage
∅
Bit 2
Frequency step > 10% / periods
→
check the synchronizing voltage (hardware)
Zero crossovers UL1-2 missing (Sitor)
∅
Bit 3
only, if the signal was present once.
→
check the line supply connection and initialization connection PA6.INV
Zero crossovers UL1-3 missing (Sitor)
∅
Bit 4
only, if the signal was present once.
→
check the line supply connection and initialization connection PA6.INV
Rotating field error = no clockwise rotating field of Vsyn.,
∅
Bit 5
or both zero crossovers missing.
(dependent on the mode: INV)
→
check the line supply connection and initialization connection PA6.INV
Undervoltage (Sitor).
∅
Bit 6
(dependent on the mode: UNM)
→
check the line supply values and connector SOL.UNM
Logical 0
∅
Bit 7
Pulse inhibit, software
Bit 8
Fault, external 1
Bit 9
Fuse monitoring (Sitor)
∅
Bit 10
→
check for fuse failure
Temperature monitoring
∅
Bit 11
→
check for overtemperature
Fault, external 2
Bit 12
External pulse inhibit for voltage missing at the input
Bit 13
→
ITDC-X5:10 > 15 V
Excitation current fault
Bit 14
(optional for SITOR set 6QG3x with excitation option)
Cause: FCS.FC > 5% and field current actual value < 3% FCS.ARC
→
check the field control/connection
Bit 15
Hardware Watchdog ITDC + hardware command: Total pulse inhibit
Causes: Defective module,
Task overflow in the PMx
Bit 16
Hardware command: Total pulse inhibit (ITDC-X5:15)
→
remove the fault statuses
Table 5-5
Fault list SOL.YW1 .YF1
5-28
Fault message → remedy
(.IPL = 1) + hardware command: Total pulse inhibit
(SOL.IF1= 1)
(Sitor)
(SOL.IF2 = 1)
+ hardware command: Total pulse inhibit
= ˆ
enable the pulses
→
replace the module
→
change the application software
System- and communication configuring D7-SYS - SIMADYN D
Source
PA6
PA6
PA6
PA6
PA6
SOL
SOL
SOL
SOL
SOL
SOL
SOL
FCS
SOL
SOL
Edition 06.2002