Significance of
fault bits ITDC
HMH → YHW
Group inhibit, fault
word YF1/YF2
Fault words
YW1 ,YW2
YF1 , YF2
System- and communication configuring D7-SYS - SIMADYN D
Edition 06.2002
YHW
Bit 1
Logical 0
∅
Fuse monitoring (Sitor)
Bit 2
→ check whether a fuse has failed
∅
Temperature monitoring (Sitor)
Bit 3
→ check for overtemperature
∅
Undervoltage (Sitor)
Bit 4
→ check the line supply values and connector SOL.UNM
∅
External pulse inhibit if a voltage is not available at the input
Bit 5
→
ITDC-X5:10 > 15 V
∅
Bit 6
Logical 0
∅
Hardware Watchdog ITDC
Bit 7
Causes: Defective module,
Task overflow in the PMx
Bit 8
Total pulse inhibit (display: ITDC-X5:15)
Cause: Voltage missing, SW pulse inhibit, HW-ITDC fault
→ remove the fault statuses
Bit 9-16
Logical 0
∅ = suppressed with MNE=1
Table 5-4
HW faults from the ITDC
If the group inhibit fault word is set (SOL.MNE=1), this permanently
deletes the defined bits in fault words SOL.YF1\2.
An alarm message is transformed from YW1 or YW2 into fault message
YF1 or YF2 by setting bits 1-16 at SOL.HM1 or SOL.HM2.
The closed-loop thyristor current control is switched-out by a fault
message in fault word YF1 or YF2.
Closed-loop thyristor current control
Fault message → remedy
= ˆ
pulse enable
= ˆ
→
replace the module
→
modify the configured software
5-27