Agilent Technologies 16517A User Reference page 57

4-gsa/s timing and 1-gsa/s synchronous state logic analyzer
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The Trigger Menu
State Trigger Macro Library
2. Find too few states between pattern 1 and pattern 2.
This macro becomes true when a designated pattern 1 is seen, followed by a
designated pattern 2, and with less than a selected number of states
occurring between the two patterns. It uses two internal sequence levels.
3. Find too many states between pattern 1 and pattern 2.
This macro becomes true when a designated pattern 1 is seen, followed by at
least a selected number of states, then followed by a designated pattern 2. It
uses two internal sequence levels.
Time Violations
1. Find pattern 2 occurring too soon after pattern 1
This macro becomes true when a designated pattern 1 is seen, followed by a
designated pattern 2, and with less than a selected time period occurring
between the two patterns. It uses two internal sequence levels.
2. Find pattern 2 occurring too late after pattern 1
This macro becomes true when a designated pattern 1 is seen, followed by at
least a selected time period, before a designated pattern 2 occurs. It uses
two internal sequence levels.
Delay
1. Wait n external clock states
This macro becomes true after a designated number of user clock states have
occurred. It uses one internal sequence level.
4–16

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