Agilent Technologies 16517A User Reference page 14

4-gsa/s timing and 1-gsa/s synchronous state logic analyzer
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General Information
Not only can you sample at the external clock transitions, but you can
set the analyzer to oversample, in powers of two, up to 32x, or, up to a
maximum of 2 GHz sample rate. Each point of oversampling is
precisely distributed evenly within the external clock period.
Triggering
Defining a trigger specification is as easy as picking a predefined
macro from a trigger macro library. Trigger macros can be used by
themselves or in combination with each other. Resource terms
include four global patterns, two global edges, and one level
dependent timer/counter. By using trigger macros, or defining your
own trigger specification, the user-friendly and flexible triggering
architecture lets you create a large array of trigger sequencing or
qualification needed.
Acquisition Control
Data storage can begin at either the start, center, end, or a
user-defined point within memory. In addition, if the data of interest
occurs a relatively long time after trigger, you can delay storage after a
trigger by a user-defined amount. With all the acquisition control
available, you can fill acquisition memory very efficiently.
Measurement Display
Measurement data is displayed as waveforms or state data listings.
State data can be compared bit by bit to a user-defined reference
image. In the state listing, you can choose to display either sample
clock transitions or both sample clock and oversampling clock
transitions. In the timing waveform display, you can show state values
integrated in the waveform.
1–3

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