Agilent Technologies 16517A User Reference page 171

4-gsa/s timing and 1-gsa/s synchronous state logic analyzer
Table of Contents

Advertisement

Specifications and Characteristics
Characteristics
Timing Analysis
Timing Modes: Conventional timing.
Timing Speed: 15.3 KSa/s − 2 GSa/s full channel, 4 GSa/s half channel.
Sample Period: 500/250 ps minimum (full/half channel mode),
65.536 µs maximum.
Channel Count: 16/8 per card (full/half channel mode).
Minimum Detectable Pulse Width:
4 GSa/s
2 GSa/s or less
Memory Depth per Channel: 65536 samples full channel mode;
131072 samples, half channel mode.
Time Covered by Data: 32.8 µs at 2 GSa/s or 4 GSa/s up to 4.3 s at
15.3 KSa/s.
Time Interval Accuracy: ± (sample period + channel-to-channel skew
+ 0.005% of time interval reading).
Sample Period Accuracy: 0.005% of sample period.
Channel-to-Channel Skew across up to 80 channels: 250 ps,
typical.
Maximum Delay After Triggering: (2 to the 20th)×(sample period),
or 16.78 ms at or below 16 ns sample period.
Note: When oversampling, use oversampled period for sample period above.
Trigger
Characteristics
Pattern Recognizers: 4. Each pattern recognizer is the AND
combination of bit (0, 1, or X) patterns.
Pattern Width: 16/32/48/64/80 channels.
Minimum Pattern Recognizer Pulse Width: 2.25 ns.
Edge Recognizers (Timing only): 2. Trigger on a rising, falling, or
either edge on any channel. Edges are OR'd across all channels.
12–6
800 ps, typical.
1.1 ns, typical.

Advertisement

Table of Contents
loading

This manual is also suitable for:

16518a

Table of Contents