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5-30
E
C
O
D
R
V I
E
0
3
D
K
G1Sin+ (S3), G1Sin- (S1):
G1Cos+ (S4), G1Cos- (S2):
G1_8V/Sin:
customerservice@hyperdynesystems.com
C
* *
3 .
0 -
1
6
Input circuit G1Sin+ (S3), G1Sin- (S1):
E+
E-
R1:
4k
R2:
4k
R3:
8k25
R4:
8k25
C1:
no data
C2:
no data
Fig. 5-48:
Input circuit
Features of the di erential input circuit G1Sin+ (S3), G1Sin- (S1):
max. allowed amplitude
encoder signal
Evaluation
AD converter
i L
m
i
f t
e r
q
u
e
n
n I
p
u
r t
s e
s i
a t
n
Fig. 5-49:
Features of the di erential input circuit
see G1Sin+ (S3), G1Sin- (S1)
Features of the encoder output ampli er stage G1_8V/Sin:
O
u
p t
t u
o v
a t l
g
m
a
. x
o
u
p t
u
c t
min. D.C.
resistance of the load
Fig. 5-50:
Features of the encoder output ampli er stage
R1
-
+
R2
R4
C2
Schematics
y c
e c
e
r u
e r
t n
|
(479) 422-0390
E
C
O
D
R
V I
E
0
3
r D
v i
e
C
C1
R3
AP5296F1.FH7
Resolver
9,0 Vss
12 Bit
- -
k 8
±
5
%
Resolver
1
8
2 ,
V
s s
(sine with 4 kHz)
A
C
7
0
m
A
e
. f f
35 R
o
n
r t
l o
e l
s r
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