ADuCM310 Hardware Reference Manual
USING THE
ADuCM310
NUMBER NOTATIONS
Table 1.
Notation
Bit N
V[x:y]
0xNN
0bNN
NN
REGISTER ACCESS CONVENTIONS
Table 2.
Mode
RW
RC
R
W
MMR bits that are not documented are reserved. Reserved bits must not be changed by the user.
ACRONYMS AND ABBREVIATIONS
Table 3.
Acronym/Abbreviation
ADC
DMA
GPIO
LSB
MMR
MSB
NMI
NVIC
Rx
SAR
SOA
SPI
SWD
Tx
UART
WDT
WUT
HARDWARE REFERENCE MANUAL
Description
Bits are numbered in little endian format, that is, the least significant bit of a number is referred to as Bit 0.
Bit field representation covering Bit x to Bit y of a value or a field (V).
Hexadecimal (Base 16) numbers are preceded by the prefix 0x.
Binary (Base 2) numbers are preceded by the prefix 0b.
Decimal (Base 10) numbers are represented using no additional prefixes or suffixes.
Description
Memory location has read and write access.
Memory location is cleared after reading it.
Memory location is read access only. A read always returns 0, unless otherwise specified.
Memory location is write access only.
Description
Analog-to-digital converter
Direct memory access
General-purpose input and output
Least significant byte/bit
Memory mapped register
Most significant byte/bit
Nonmaskable interrupt
Nested vectored interrupt controller
Receive
Successive approximation register
Semiconductor optical amplifier
Serial peripheral interface
Sync word detect/serial wire debug
Transmit
Universal asynchronous transmitter
Watchdog timer
Wake-up timer
Rev. C | Page 5 of 192
UG-549
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