Analog Devices ADuCM310 Hardware Reference Manual page 191

ADuCM310 Hardware Reference Manual
Interrupt Register for Block 0 and Block 1
Address: 0x40005884, Reset: 0x0000, Name: PLA_IRQ0
Table 298. Bit Descriptions for PLA_IRQ0
Bits Bit Name
[15:13] RESERVED
12 IRQ1_EN
[11:8] IRQ1_SRC
[7:5] RESERVED
4 IRQ0_EN
[3:0] IRQ0_SRC
Interrupt Register for Block 2 and Block 3
Address: 0x40005888, Reset: 0x0000, Name: PLA_IRQ1
Table 299. Bit Descriptions for PLA_IRQ1
Bits Bit Name
[15:13] RESERVED
12 IRQ3_EN
[11:8] IRQ3_SRC
[7:5] RESERVED
4 IRQ2_EN
[3:0] IRQ2_SRC
ADC Configuration Register
Address: 0x4000588C, Reset: 0x0000, Name: PLA_ADC
Table 300. Bit Descriptions for PLA_ADC
Bits Bit Name
[15:6] RESERVED
5 CONVST_EN
[4:0] CONVST_SRC
Description
Not used.
IRQ1 enable.
0: disable IRQ1 interrupt.
1: enable IRQ1 interrupt.
IRQ1 source select (Element 0 to Element 15). The 4-bit value corresponds
to the element number (for example, 1011 selects Element 11).
Not used.
IRQ0 enable.
0: disable IRQ0 interrupt.
1: enable IRQ0 interrupt.
IRQ0 source select (Element 0 to Element 15). The 4-bit value corresponds
to the element number (for example, 1011 selects Element 11).
Description
Not used.
IRQ3 enable.
0: disable IRQ3 interrupt.
1: enable IRQ3 interrupt.
IRQ3 source select (Element 16 to Element 31). The element number
corresponds to the 4-bit value + 16 (for example, 1011 selects Element 27).
Not used.
IRQ2 enable.
0: disable IRQ2 interrupt.
1: enable IRQ2 interrupt.
IRQ2 source select (Element 16 to Element 31). The element number
corresponds to the 4-bit value + 16 (for example, 1011 selects Element 27).
Description
Not used.
Bit to enable ADC start convert from PLA.
0: disable.
1: enable.
Element for ADC start convert source. The binary value corresponds to
the element number. For example, Element 23 is 10111.
Rev. C | Page 191 of 192
UG-549
Reset Access
0x0 Reserved
0x0 RW
0x0 RW
0x0 Reserved
0x0 RW
0x0 RW
Reset Access
0x0 Reserved
0x0 RW
0x0 RW
0x0 Reserved
0x0 RW
0x0 RW
Reset Access
0x000 Reserved
0x0 RW
0x00 RW