Uart0; Figure 25.1. Uart0 Block Diagram - Silicon Laboratories C8051T620 Manual

25. UART0

UART0 is an asynchronous, full duplex serial port offering modes 1 and 3 of the standard 8051 UART.
Enhanced baud rate support allows a wide range of clock sources to generate standard baud rates (details
in Section "25.1. Enhanced Baud Rate Generation" on page 216). Received data buffering allows UART0
to start reception of a second incoming data byte before software has finished reading the previous data
byte.
UART0 has two associated SFRs: Serial Control Register 0 (SCON0) and Serial Data Buffer 0 (SBUF0).
The single SBUF0 location provides access to both transmit and receive registers. Writes to SBUF0
always access the Transmit register. Reads of SBUF0 always access the buffered Receive register;
it is not possible to read data from the Transmit register.
With UART0 interrupts enabled, an interrupt is generated each time a transmit is completed (TI0 is set in
SCON0), or a data byte has been received (RI0 is set in SCON0). The UART0 interrupt flags are not
cleared by hardware when the CPU vectors to the interrupt service routine. They must be cleared manually
by software, allowing software to determine the cause of the UART0 interrupt (transmit complete or receive
complete).
UART Baud
Rate Generator
C8051T620/1/6/7 & C8051T320/1/2/3
SFR Bus
Write to
SBUF
TB8
SBUF
SET
(TX Shift)
D Q
CLR
Zero Detector
Stop Bit Shift
Start
Tx Control
Tx Clock
Tx IRQ
SCON
Rx IRQ
Rx Clock
Rx Control
Start
Shift 0x1FF RB8
Input Shift Register
(9 bits)
Load SBUF
SBUF
(RX Latch)
Read
SBUF
SFR Bus

Figure 25.1. UART0 Block Diagram

Rev. 1.2
TX
Crossbar
Data
Send
TI
Serial
Port
Interrupt
RI
Load
SBUF
RX
Crossbar
Port I/O
215