Sfr Definition 14.2. Cpt0Md: Comparator0 Mode Selection - Silicon Laboratories C8051T620 Manual

SFR Definition 14.2. CPT0MD: Comparator0 Mode Selection

Bit 7
Name
R R
Type
0
Reset
SFR Address = 0x9D
Bit Name
7:6 Unused Read = 00b, Write = Don't Care.
5 CP0RIE
Comparator0 Rising-Edge Interrupt Enable.
0: Comparator0 Rising-edge interrupt disabled.
1: Comparator0 Rising-edge interrupt enabled.
4 CP0FIE
Comparator0 Falling-Edge Interrupt Enable.
0: Comparator0 Falling-edge interrupt disabled.
1: Comparator0 Falling-edge interrupt enabled.
3:2 Unused Read = 00b, Write = don't care.
1:0 CP0MD[1:0] Comparator0 Mode Select.
These bits affect the response time and power consumption for Comparator0.
00: Mode 0 (Fastest Response Time, Highest Power Consumption)
01: Mode 1
10: Mode 2
11: Mode 3 (Slowest Response Time, Lowest Power Consumption)
C8051T620/1/6/7 & C8051T320/1/2/3
6 5 4
CP0RIE CP0FIE
R/W R/W
0 0 0
Rev. 1.2
3 2
R R
0 0
Function
1 0
CP0MD[1:0]
R/W
1 0
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