Package Specifications; Figure 5.1. Qfn-32 Package Drawing - Silicon Laboratories C8051T620 Manual

C8051T620/1/6/7 & C8051T320/1/2/3
5. QFN-32 Package Specifications
Dimension Min
A 0.80
A1 0.00
b 0.18
D
D2 3.20
e
E
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-220, variation VHHD except for
custom features D2, E2, and L which are toleranced per supplier designation.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
30

Figure 5.1. QFN-32 Package Drawing

Table 5.1. QFN-32 Package Dimensions
Typ Max
0.90 1.00
0.02 0.05
0.25 0.30
5.00 BSC.
3.30 3.40
0.50 BSC.
5.00 BSC.
Rev. 1.2
Dimension Min
E2 3.20
L 0.30
L1 0.00
aaa
bbb
ddd
eee
Typ Max
3.30 3.40
0.40 0.50
— 0.15
0.15
0.10
0.05
0.08