Silicon Laboratories C8051T627 Manuals

Manuals and User Guides for Silicon Laboratories C8051T627. We have 1 Silicon Laboratories C8051T627 manual available for free PDF download: Manual

Silicon Laboratories C8051T627 Manual (299 pages)

Full Speed USB EPROM MCU Family

Brand: Silicon Laboratories | Category: Microcontrollers | Size: 1 MB

Table of Contents
3
1 System Overview

15
2 Ordering Information

21
- Table 2.1. Product Selection Guide
  21
3 Pin Definitions

22
4 LQFP-32 Package Specifications

28
- Figure 4.1. LQFP-32 Package Drawing
  28
- Figure 4.2. LQFP-32 Recommended PCB Land Pattern
  29
5 Package Specifications

30
- Figure 5.1. QFN-32 Package Drawing
  30
- Figure 5.2. QFN-32 Recommended PCB Land Pattern
  31
6 Package Specifications

32
- Figure 6.1. QFN-28 Package Drawing
  32
- Figure 6.2. QFN-28 Recommended PCB Land Pattern
  33
7 Electrical Characteristics

34
8 Bit ADC (ADC0, C8051T620/6/7 and C8051T320/1 Only)

45
9 Temperature Sensor (C8051T620/6/7 and C8051T320/1 Only)

57
- Figure 9.1. Temperature Sensor Transfer Function
  57
10 Voltage Reference Options

59
- Figure 10.1. Voltage Reference Functional Block Diagram
  59
- SFR Definition 10.1. REF0CN: Reference Control
  60
11 Voltage Regulators (REG0 and REG1)

61
12 Microcontroller

66
13 Prefetch Engine

76
- SFR Definition 13.1. PFE0CN: Prefetch Engine Control
  76
14 Comparator0 and Comparator1

77
15 Memory Organization

87
16 Special Function Registers

95
- Table 16.1. Special Function Register (SFR) Memory Map
  95
- Table 16.2. Special Function Registers
  96
17 Interrupts

101
18 Program Memory (EPROM)

112
19 Power Management Modes

118
- Idle Mode
  118
- Stop Mode
  119
- Suspend Mode
  119
- SFR Definition 19.1. PCON: Power Control
  120
20 Reset Sources

121
- Figure 20.1. Reset Sources
  121
  - Power-On Reset
    122
  - Power-Fail Reset / VDD Monitor
    122
  - Figure 20.2. Power-On and VDD Monitor Reset Timing
    122
  - External Reset
    124
  - Missing Clock Detector Reset
    124
  - Comparator0 Reset
    124
- SFR Definition 20.1. VDM0CN: VDD Monitor Control
  124
  - PCA Watchdog Timer Reset
    125
  - EPROM Error Reset
    125
  - Software Reset
    125
  - USB Reset
    125
- SFR Definition 20.2. RSTSRC: Reset Source
  126
21 Oscillators and Clock Selection

127
22 Port Input/Output

138
23 Universal Serial Bus Controller (USB0)

160
- Figure 23.1. USB0 Block Diagram
  160
  - Endpoint Addressing
    161
  - USB Transceiver
    161
  - Table 23.1. Endpoint Addressing Scheme
    161
- SFR Definition 23.1. USB0XCN: USB0 Transceiver Control
  162
  - USB Register Access
    163
  - Figure 23.2. USB0 Register Access Scheme
    163
- SFR Definition 23.2. USB0ADR: USB0 Indirect Address
  164
- SFR Definition 23.3. USB0DAT: USB0 Data
  165
  - Table 23.2. USB0 Controller Registers
    166
  - USB Clock Configuration
    168
  - FIFO Management
    169
    
    Figure 23.3. C8051T620/1 and C8051T320/1/2/3 USB FIFO Allocation
    169
    
    FIFO Double Buffering
    170
    
    FIFO Split Mode
    170
    
    Figure 23.4. C8051T626/7 USB FIFO Allocation
    170
    
    FIFO Access
    171
    
    Table 23.3. FIFO Configurations
    171
  - Function Addressing
    172
  - Function Configuration and Control
    173
  - Interrupts
    176
  - Endpoint0
    181
    
    Endpoint0 in Transactions
    182
    
    Endpoint0 SETUP Transactions
    182
    
    Endpoint0 out Transactions
    183
  - The Serial Interface Engine
    181
  - Configuring Endpoints1-3
    185
  - Controlling Endpoints1-3 in
    186
    
    Endpoints1-3 in Interrupt or Bulk Mode
    186
    
    Endpoints1-3 in Isochronous Mode
    187
  - Controlling Endpoints1-3 out
    189
    
    Endpoints1-3 out Interrupt or Bulk Mode
    190
    
    Endpoints1-3 out Isochronous Mode
    190
24 Smbus

194
- Figure 24.1. Smbus Block Diagram
  194
  - Supporting Documents
    195
  - Smbus Configuration
    195
  - Smbus Operation
    195
    
    Figure 24.2. Typical Smbus Configuration
    195
    
    Arbitration
    196
    
    Clock Low Extension
    196
    
    Figure 24.3. Smbus Transaction
    196
    
    SCL Low Timeout
    196
    
    Transmitter Vs. Receiver
    196
    
    SCL High (Smbus Free) Timeout
    197
  - Using the Smbus
    197
    
    Smbus Configuration Register
    197
    
    Figure 24.4. Typical Smbus SCL Generation
    198
- SFR Definition 24.1. SMB0CF: Smbus Clock/Configuration
  200
  - SMB0CN Control Register
    201
    
    Hardware ACK Generation
    201
    
    Software ACK Generation
    201
- SFR Definition 24.2. SMB0CN: Smbus Control
  202
  - Hardware Slave Address Recognition
    203
- SFR Definition 24.3. SMB0ADR: Smbus Slave Address
  204
- SFR Definition 24.4. SMB0ADM: Smbus Slave Address Mask
  205
  - Data Register
    206
- SFR Definition 24.5. SMB0DAT: Smbus Data
  206
  - Smbus Transfer Modes
    207
    
    Figure 24.5. Typical Master Write Sequence
    207
    
    Write Sequence (Master)
    207
    
    Figure 24.6. Typical Master Read Sequence
    208
    
    Read Sequence (Master)
    208
    
    Figure 24.7. Typical Slave Write Sequence
    209
    
    Write Sequence (Slave)
    209
    
    Read Sequence (Slave)
    210
  - Smbus Status Decoding
    210
  - Figure 24.8. Typical Slave Read Sequence
    210
25 Uart0

215
26 Uart1

223
27 Enhanced Serial Peripheral Interface (SPI0)

233
28 Timers

246
29 Programmable Counter Array

268
30 C2 Interface

288
- C2 Interface Registers
  288
- C2 Pin Sharing
  295
- Figure 30.1. Typical C2 Pin Sharing
  295
Document Change List

296
Contact Information

298

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Silicon Laboratories C8051T627 Manuals

Silicon Laboratories C8051T627 Manual (299 pages)

Table of Contents

1 System Overview

2 Ordering Information

3 Pin Definitions

4 LQFP-32 Package Specifications

5 Package Specifications

6 Package Specifications

7 Electrical Characteristics

8 Bit ADC (ADC0, C8051T620/6/7 and C8051T320/1 Only)

9 Temperature Sensor (C8051T620/6/7 and C8051T320/1 Only)

10 Voltage Reference Options

11 Voltage Regulators (REG0 and REG1)

12 Microcontroller

13 Prefetch Engine

14 Comparator0 and Comparator1

15 Memory Organization

16 Special Function Registers

17 Interrupts

18 Program Memory (EPROM)

19 Power Management Modes

20 Reset Sources

21 Oscillators and Clock Selection

22 Port Input/Output

23 Universal Serial Bus Controller (USB0)

24 Smbus

25 Uart0

26 Uart1

27 Enhanced Serial Peripheral Interface (SPI0)

28 Timers

29 Programmable Counter Array

30 C2 Interface

Document Change List

Contact Information

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