Figure 27. Power Delivered By An Internal 1.8V Vr Only - Intel Quark SE Series Platform Manual

6. In this implementation, the internal power ON sequence must be followed. You
can find this sequence in the Intel® Quark™ SE Microcontroller C1000
Datasheet.
Special care must be taken in the event of a hardware power down of
Note:
VCC_BATT_OPM_3P7 followed by a power up sequence. Ensure that the Intel®
Quark™ SE microcontroller C1000 reference voltage OPM_2P6 is discharged to
ground before a power up cycle. For suggestions on how to ensure the correct
voltage levels in VCC_AVD_OPM_2P6 at any time, refer to the Intel® Quark™ SE
Microcontroller C1000 Power Sequencing Considerations Application Note.
7. Disable the unused internal VR by software during the initial boot flow.
The following figure shows an implementation where the internal 1.8V VR is
utilized, but the 3.3V internal VR is not used.

Figure 27. Power Delivered by an Internal 1.8V VR Only

(from external supply)
(from Internal/external supply)
(from external supply)
Intel® Quark™ SE Microcontroller C1000
Platform Design Guide
54
PLT_REF_EN
1.8V
VCC_AON_1P8
1.8V or 3.3V
VCC_IO_AON
1.8V
VCC_HOST_1P8
Intel® Quark SE Microcontroller
VCC_SENSE_ESR3
VCCOUT_QLR3_1P8
VCCOUT_ESR3_1P8
VSS_GNDSENSE_ESR3
VCC_SENSE_ESR1
VCCOUT_QLR1_3P3
VCCOUT_ESR1_3P3
VSS_GNDSENSE_ESR1
VCC_SENSE_ESR2
VCCOUT_QLR2_1P8
VCCOUT_ESR2_1P8
VSS_GNDSENSE_ESR2
N/C
N/C
Document Number: 334715-004EN
Power
June 2017