Power Supplies Monitored By The Por Circuitry - Intel Agilex User Manual

3. Intel Agilex Power and I/O State Sequencing
UG-20215 | 2019.04.02
POR delay is the time from when the POR trips out to the final reset signal. For POR
trip level, you can use the minimum value of the last power supply as a reference.
The Intel Agilex device is held in the POR state until all power supplies have passed
their trigger point. After power supplies have passed the trigger point, the Secure
Device Manager (SDM) will wait for a configurable delay time and then start device
configuration.
Related Information
Intel Agilex Device Data Sheet
Provides more information about the t

3.3.1. Power Supplies Monitored by the POR Circuitry

The following power supplies are monitored by the Intel Agilex POR circuitry:
• V
CCL_SDM
• V
CCPT
• V
CCIO_SDM
• V
CCADC
• V
CCBAT
• V
CC
• V
CCH_SDM
• V
CCL_HPS
• V
CCIO_PIO_SDM
Note: For the device to exit POR, you must power the V
not use the volatile key.
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and POR specifications.
RAMP
power supply even if you do
CCBAT
® ™
Intel Agilex Power Management User Guide
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