Uart Pin Termination; Jtag Pin Termination; Figure 32. I 2 C Pin Termination Example (External Pull-Up Resistor); Figure 33. Uart Pin Termination Example - Intel Quark SE Series Platform Manual

Termination of Unused Pins
Figure 32. I 2 C Pin Termination Example (External Pull-up Resistor)
VCC
14.2.4

UART Pin Termination

UART is in idle state when both its lines are set to HIGH. To prevent the transmitter
pin from floating during reset or power up, both UART input (RXD) and output (TXD)
pins could be terminated by connecting them to VCC through pull-up, for example,
10 kΩ resistors.

Figure 33. UART Pin Termination Example

14.2.5

JTAG Pin Termination

The specification of IEEE 1149.1 standard requires all JTAG pins to be connected to
their internal termination. Therefore, there is no need to terminate unused JTAG
pins. For extra safety, however, the JTAG pins could be terminated externally.
Figure 34
to VSS through a 10 kΩ pull-down resistor. The JTAG TMS, TRST_B and TDI pins
June 2017
Document Number: 334715-004EN
3 kΩ
R
PU
Figure 33 illustrates this termination.
Intel® Quark SE
Microcontroller
C1000
BGA 144 Package
UART0_RXD_AIN_18
UART0_TXD_GPIO_31
illustrates termination of the JTAG_TCK pin (ball G2), which is connected
Intel® Quark SE
Microcontroller
C1000
BGA 144 Package
B12 I2C0_SDA
10 kΩ
E8
R
PU
10 kΩ
E9
R
PU
Intel® Quark™ SE Microcontroller C1000
VCC
Platform Design Guide
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