Features; Table 28. Usb Routing Requirements - Intel Quark SE Series Platform Manual

USB

Table 28. USB Routing Requirements

USB_DP/DN
Transmission Line Segment
Routing Layer
(Microstrip/Stripline/Dual
Stripline)
Characteristic Impedance
(Differential)
Trace Width (w)
Trace Spacing (S): Between P
and N within a diff pair
Trace Spacing(S1): Between
USB pairs
Trace Spacing (S2): Between
diff pairs and other signals
Trace Spacing(S3): Between
diff pairs and high speed CLK
signals
Trace Length
Length mismatch between P
and N of same pair
Length mismatch between
pairs
Total Trace Length
Number of vias allowed
Via stub length
Cable length supported (front
panel)
Rs
Reference
H
12.2

Features

The following is a list of the USB controller features:
 Supports USB 1.1 Full speed only (12 Mbps)

Supports internal DMA



June 2017
Document Number: 334715-004EN
Buffer mode DMA supported (scatter gather mode is not supported)
DMA control per endpoint per direction supported
Generates DMA interrupt after a configurable number of bytes/packets
have been transmitted
SoC Breakout Main Routing
TL0
MS/SL
90Ω +/- 10% 90Ω +/- 10%
4 mils minimum Meet impedance
4 mils minimum Meet impedance
max (15 mils or
4 mils minimum
max (25 mils or
4H
4H
TL0 + TL1 + TL2
<200 mils + TL3 < 7500
<10 mils
Not required
Total Length < 7500 mil
4
< 80 mils
9 inch
33 Ω
VSS referencing; No plane split allowed
H is the distance to the nearest reference plane
Intel® Quark™ SE Microcontroller C1000
USB
CMC and ESD
routing
TL1 TL2 & TL3
MS/SL MS
90Ω +/- 10%
Meet
impedance
Meet
impedance
max (15 mils or
3H) 3H)
max (25 mils or
5H) 5H)
50 mils 50 mils
TL2+TL3 < 500
mils
mils
Platform Design Guide
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