Fujitsu F2MC-8L Family series Hardware Manual page 47

Peripherals
Address: 0014 PCR1
H
Address: 0015 PCR2
H
Address: 0016 RLBR
H
Address: 0017 NCCR
H
HARDWARE CONFIGURATION
1 is always read when the Read Modify Write instruction is executed.
The meaning of each bit to be written is as follows:
0
Clears this bit
1
Unchanges this bit and other bits unaffected
[Bit 1] IR: Measurement-end interrupt request bit
When the IE bit (bit 5) of the PCR1 is 1, an interrupt occurs at the end of
pulse-width measurement.
The meaning of each bit to be read is as follows:
0
Pulse-width measurement not terminated
1
Pulse-width measurement terminated
1 is always read when the Read Modify Write instruction is executed.
The meaning of each bit to be written is as follows:
0
Clears this bit
1
Unchanges this bit and other bits unaffected
[Bit 0] BF: Buffer-full flag
When the IE bit (bit 5) of the PCR1 is 1, an interrupt occurs when any
measured value is found in the RDBR. This bit is set at the end of pulse-
width measurement and cleared when data in the buffer is read.
The meaning of each bit to be read is as follows:
0
Pulse-width measured value not found
1
Pulse-width measured value found
(b) Pulse-width control register 2 (PCR2)
Bit 7 Bit 6
FC RM
Address: 0015
H
(R/W) (R/W)
[Bit 7] FC: Function select bit
Bit 7 is used to select the timer and pulse-width measurement functions.
0
Timer function
1
Pulse-width measurement function
One should not change the function select bit when timer function is enabled
(EN=1).
2– 32
Bit 5 Bit 4 Bit 3 Bit 2
TO — C1 C0
(R/W) (R/W) (R/W)
(Initial value)
000X0000
B
Bit 1 Bit 0
W1 W0
(R/W) (R/W)