Proper Thermtrip# Usage; Recommended Thermtrip# Circuit - Intel Xeon Design Manual

®
Intel Xeon™ Processor and Intel
Figure 3. FERR# Routing Topology for Low Voltage Intel
VCC_CPU
NOTE:
1. Refer to
2.3.1.2

Proper THERMTRIP# Usage

To protect the processors from damage in over-temperature situations, power to the processor core
must be removed within 0.5 seconds of the assertion of the THERMTRIP#. If power is applied to a
processor when no thermal solution is attached, normal leaking currents causes the die temperature
to rapidly rise to levels at which permanent silicon damage is possible. This high temperature
causes THERMTRIP# to go active. Use dual termination on the THERMTRIP# signal. Each
processor's THERMTRIP# can be routed to its own receiver, or they can be wire-OR'd together. If
routed separately, each signal must be terminated at the receiver end only. All power supply
sources to all processors must be disabled when any install processor signals THERMTRIP#. In the
reference schematic, the 74AHC74 flip-flop latches the THERMTRIP# signal HIGH after a
PWRGOOD assertion, and LOW after a THERMTRIP# assertion. The recommended
THERMTRIP# circuit is shown in
Figure 1. Recommended THERMTRIP# Circuit
16
®
E7500/E7501 Chipset Compatible Platform
56Ω
Processor
0
3 inches max
Figure 6 for voltage translator information.
3VSBY
62 Ω
3904
VCC_CPU
THERMTRIP#
®
Xeon™ Processors
1 to 12 inches
Figure 1.
74AHC74
VCC=3VSBY
1 KΩ 10 KΩ
SET
D Q
3904
Q#
CLR
100 KΩ
1 KΩ
Platform Design Guide Addendum
VCC_CPU
ICH3-S
(FERR#)
56Ω
Voltage
(1)
Translator
3 inches max
A9046-01
12 V
3.3 KΩ
1 KΩ
THERM_EN to VR
A9844-01