System Architecture - Analog Devices ADSP-BF526 EZ-Board Manual

System Architecture

System Architecture
This section describes the processor's configuration on the EZ-Board
(Figure 2-1).
Power Regulation
1.8 Volt, 3.3 Volt,
2.5 Volt, 5.0 Volt
Li Battery
Charge Circuit
IDC
Conn
USB OTG Conn
3.3 Volts
5 Volts source when
in Host Mode
24 MHz
Crystal
3.3 Volts
Ethernet Phy RMII
1.8 Volts (MAC to Phy)
3.3 Volts (Phy to Mag)
RJ11
IDC
Conn
4 Mb
SPI Boot
Flash
1.8 Volts
Figure 2-1. System Architecture
This EZ-Board is designed to demonstrate the capabilities of the
ADSP-BF526 Blackfin processors. The processor has an I/O voltage of
1.8V. The core voltage of the processor is controlled by an Analog Devices
ADP1715 low dropout regulator (LDO) and an Analog Devices AD5258
2-2
32.768 KHz 25 MHz
Crystal Crystal
3.3 volt 1.8 Volts
+3.0
LI-ION
Battery
RTC CLKIN
12mmX12mm/0.5 pitch
UARTs SPI
RS-232
TX/RX
IDC
Conn
3.3 Volts
12 MHz
RS-232
Crystal
Female
1.8 Volts
ADSP-BF526 EZ-Board Evaluation System Manual
2 Gb 64 MB
NAND Flash SDRAM
(512M x 8 ) (32M x 16)
1.8 Volts 1.8 Volts
NAND EBIU
ADSP-BF525
DSP
400 MHz
SPORT TWI
Audio
Codec
IDC IDC
1.8 Volts
Conn Conn
Mic/ Head/
Line Line
In Out
High
4 MB
Density
Flash
EBIU
(2M x 16 )
Expansion
1.8 Volts
Interface
Rotary
1.8 Volts
LEDs (3)
1.8 Volts
PBs (2)
1.8 Volts
IDC
Conn
PPI
IDC Fuel
Conn Gauge