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System Architecture
System Architecture
This section describes the processor's configuration on the EZ-KIT Lite
board.
Figure 2-1. System Architecture
The EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-TS101S TigerSHARC processor. The processor core voltage is
1.25V. The external interface operates at 3.3V.
An 83.33 MHz SMT oscillator supplies the input clock to the processor.
The speed at which the core operates is determined by the settings of the
processor switch
on page
2-7. By default, the processor core runs at 250 MHz
(83.3 MHz x 3).
2-2
. For more information, see
SW7
ADSP-TS101S EZ-KIT Lite Evaluation System Manual
"Clock Mode Settings"
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