Table 2-11. GPIO Enable Switch (SW20)
SW20 Position
From
(Default)
1 (
)
Push button 1
ON
(
SW19
2 (
)
Push button 2
ON
(
SW15
3 (
)
Power down push
OFF
button
(
SW16
4 (
)
Wake push but-
OFF
ton (
5 (
)
OFF
OTP_FLAG_1P8V
(
U3
6 (
)
OFF
USB_VRSEL
(
U23
The OTP memory writes require a precise 7V supply, which is turned on
by setting high the
the processor by setting positions 2 and 6 of
These settings connect the
pin of the precise 7V circuit
The
USB_VRSEL
interface when running in host mode. A connection to the
nal is set by the
Then the
PG13
trol the p-channel mosfet (
page 1-23
for more information.
ADSP-BF526 EZ-Board Evaluation System Manual
ADSP-BF526 EZ-Board Hardware Reference
To
Processor
)
(
,
U1
PG0
Processor
)
(
,
U1
PG13
Processor
(
,
U1
PG12
)
Processor
)
(
,
SW17
U1
PG15
Processor
)
(
,
U1
PG13
Processor
)
(
,
U1
PG13
OTP_FLAG_1P8V
flag pin of the processor to the shutdown
PG13
.
VR9
provides 5V to a device connected over the USB OTG
switch (positions 2 and 5
SW13
programmable flag pin of the processor can be used to con-
). Refer to
U23
Function
(
)
ON
PB1
)
(
CTS
OFF
UART1
U21
expansion interface II
(
)
ON
PB2
)
(host connector
OFF
, OTG voltage select
SW20.8
interface II
,
P2.40
P4.40
(
not driven by the power down push
OFF
LED2
)
button)
(
drives
ON
SW16
PG12
(connects the wake push button
ON
)
)
PG15
(
controls the OTP flag for OTP
ON
PG13
)
writes)
Requires
SW20.2 OFF
installed
(
controls
ON
PG13
USB_VRSEL PG13
)
host power)
Requires
SW20.2 OFF
signal. The OTP flag is connected to
to
SW20
OFF
and position 6
OFF
"USB OTG Interface" on
, host connector
,
P9.12
,
,
)
P2.37
P4.37
J1.52
, OTP flag for writes
P9.8
, expansion
SW13.7
,
)
J1.53
)
to
SW17
,
, and
SW20.6 OFF
JP16
for OTG
and
SW20.5 OFF
and position 5
ON
sig-
USB_VRSEL
).
ON
2-17
.
Need help?
Do you have a question about the ADSP-BF526 EZ-Board and is the answer not in the manual?