Analog Devices ADSP-BF526 EZ-Board Manual page 67

Table 2-3. PH Port Programmable Flag Connections (Cont'd)
Processor Pin Other Processor Function
PH4 ND_D4/MIITXCLK/
RMIIREF_CLK/HOST_D4
PH5 ND_D5/ETXD0/HOST_D5
PH6 ND_D6/ERXD0/HOST_D6
PH7 ND_D7/ETXD1/HOST_D7
PH8 SPISEL4#/ERXD1/
HOST_D8/TACLK2
PH9 SPISEL5#/ETXD2/
HOST_D9/TACLK3
PH10 ND_CE#_ERXD2/HOST_D10
PH11 ND_WE/ETXD3/HOST_D11
PH12 ND_RE/ERXD3/HOST_D12
PH13 ND_BUSY/ERXCLK/
HOST_D13
ADSP-BF526 EZ-Board Evaluation System Manual
ADSP-BF526 EZ-Board Hardware Reference
EZ-Board Function
Default: NAND data 4 (
PHY RMII ref clock
nector data 4 (
Default: NAND data 5 (
PHY RMII transmit data 0
data 5 (
Default: NAND data 6 (
PHY RMII receive data 0 (
SW11.3
via
P6.B11
Default: NAND data 7 (
PHY RMII transmit data 1 (
data 7 (
Default: PHY RMII receive data 1 (
PHY mode via
expansion interface II (
via
P6.B15
Default: host connector
P2.23
Default: NAND chip (
Host connector data 10 (
P6.B26
Default: NAND write enable (
Host connector data 11 (
P6.B24
Default: NAND output enable (
Host connector data 12 (
P6.B21
Default: NAND busy (
Host connector data 13 (
P6.B23
) via
U15
via
U29 SW12.3
), land grid array via
P9.23
) via
U15
(U29.23
), land grid array via
P9.21
) via
U15
U29.18
, host connector data 6 (
.
) via
U15
U29.24
), land grid array via
P9.17
, host connector data 8 (
SW11.2
,
P2.22
.
P9.13
, , land grid array via
P4.23
) enable via
U15
P9.11
.
), land grid array via
P9.9
.
), land grid array via
P9.7
.
).
U15
), land grid array via
P9.5
.
.
RN4
and , host con-
U20
.
P6.B9
.
RN4
), host connector
.
P6.B8
.
RN4
), PHY mode via
), land grid array
P9.19
.
RN4
), host connector
.
P6.B12
) via .
U29.17 RN5
),
P9.15
), land grid array
P4.22
, expansion interface II
.
P6.B27
SW13.4
), land grid array via
).
U15
).
U15
2-7